https://community.intel.com/t5/OpenCL-for-CPU/OpenCL-memory-model-mapping-to-Intel-CPU-device-and-HD-Graphics/m-p/944260#M1860 <P>On HD graphics:</P> <P>Local memory is mapped to SLM (low latency)<BR />Global/Constant is mapped to Main memory (graphics L3 cache)<BR />Private data is mapped to the graphics register file but in some cases may be mapped to main memory (for large arrays etc.)</P> <P>Hope this answers your question.</P> <P>Thanks,<BR />Raghu</P> Wed, 21 Aug 2013 19:06:28 GMT Raghupathi_M_Intel 2013-08-21T19:06:28Z https://community.intel.com/t5/OpenCL-for-CPU/OpenCL-memory-model-mapping-to-Intel-CPU-device-and-HD-Graphics/m-p/944259#M1859 <P>Anyone could introduce how the opencl memory model is mapping to Intel CPU device and HD Graphics?</P> <P>Global Memory:</P> <P>Global/Constant Memory/Data Cache:</P> <P>Local Memory: this should be SLM (part of L3 cache) in HD graphics</P> <P>Private Memory: this should be register files in HD graphics.</P> <P>Thanks!</P> Tue, 09 Jul 2013 06:26:42 GMT https://community.intel.com/t5/OpenCL-for-CPU/OpenCL-memory-model-mapping-to-Intel-CPU-device-and-HD-Graphics/m-p/944259#M1859 cheng_z_Intel 2013-07-09T06:26:42Z https://community.intel.com/t5/OpenCL-for-CPU/OpenCL-memory-model-mapping-to-Intel-CPU-device-and-HD-Graphics/m-p/944260#M1860 <P>On HD graphics:</P> <P>Local memory is mapped to SLM (low latency)<BR />Global/Constant is mapped to Main memory (graphics L3 cache)<BR />Private data is mapped to the graphics register file but in some cases may be mapped to main memory (for large arrays etc.)</P> <P>Hope this answers your question.</P> <P>Thanks,<BR />Raghu</P> Wed, 21 Aug 2013 19:06:28 GMT https://community.intel.com/t5/OpenCL-for-CPU/OpenCL-memory-model-mapping-to-Intel-CPU-device-and-HD-Graphics/m-p/944260#M1860 Raghupathi_M_Intel 2013-08-21T19:06:28Z