<?xml version="1.0" encoding="UTF-8"?>
<rss xmlns:content="http://purl.org/rss/1.0/modules/content/" xmlns:dc="http://purl.org/dc/elements/1.1/" xmlns:rdf="http://www.w3.org/1999/02/22-rdf-syntax-ns#" xmlns:taxo="http://purl.org/rss/1.0/modules/taxonomy/" version="2.0">
  <channel>
    <title>topic Hi Raghu in OpenCL* for CPU</title>
    <link>https://community.intel.com/t5/OpenCL-for-CPU/Region-Addressing-in-openCL-kernel/m-p/951004#M1997</link>
    <description>&lt;P&gt;Hi Raghu&lt;BR /&gt;&lt;BR /&gt;Thank ypu a lot for the answer. Can we just wrap it up ?&lt;/P&gt;
&lt;P&gt;I think twiddling uses&amp;nbsp;direct region adressing, i.e. the element access&amp;nbsp;in the region is coded.&lt;BR /&gt;Im am right ? E.g.:&lt;BR /&gt;float4 a, b;&lt;BR /&gt;a.s0123 = b.s3210;&lt;/P&gt;
&lt;P&gt;(One could dissassemble the .ir to check the GPU asm, but I guess, this needs a certain VTune version ?)&lt;/P&gt;
&lt;P&gt;Which opencl C code statement would lead to an indirect region adressing by the compiler ?&lt;BR /&gt;Some array access ? Here my untested idea:&lt;BR /&gt;float4 dst;&lt;BR /&gt;float4 src[ 16 ];&lt;BR /&gt;int4 idx = ... ; // values within range 0..15&lt;BR /&gt;dst&amp;nbsp;= src[ idx ];&lt;/P&gt;
&lt;P&gt;Yes, it could be done also with several fetches. Would the compiler combine those into one inderect region adressing ?&lt;BR /&gt;dst.s0 = src[ idx.s0 ];&lt;BR /&gt;dst.s1 = src[ idx.s1 ];&lt;/P&gt;
&lt;P&gt;Best regards, Stephan&lt;/P&gt;</description>
    <pubDate>Tue, 14 May 2013 10:34:16 GMT</pubDate>
    <dc:creator>Stephan1</dc:creator>
    <dc:date>2013-05-14T10:34:16Z</dc:date>
    <item>
      <title>Region Addressing in openCL kernel</title>
      <link>https://community.intel.com/t5/OpenCL-for-CPU/Region-Addressing-in-openCL-kernel/m-p/951002#M1995</link>
      <description>&lt;P&gt;Hi&lt;/P&gt;
&lt;P&gt;The Intel OpenSource HD Graphics Programmer's Reference Manual Vol 4 Part 2 for HD 4000 describes the region adressing feature.&lt;/P&gt;
&lt;P&gt;Is it possible to utilize register indrect region addressing in an openCL kernel on HD4000 ?&lt;/P&gt;
&lt;P&gt;Best regards, Stephan&lt;/P&gt;</description>
      <pubDate>Tue, 07 May 2013 09:08:58 GMT</pubDate>
      <guid>https://community.intel.com/t5/OpenCL-for-CPU/Region-Addressing-in-openCL-kernel/m-p/951002#M1995</guid>
      <dc:creator>Stephan1</dc:creator>
      <dc:date>2013-05-07T09:08:58Z</dc:date>
    </item>
    <item>
      <title>Hi Stephan,</title>
      <link>https://community.intel.com/t5/OpenCL-for-CPU/Region-Addressing-in-openCL-kernel/m-p/951003#M1996</link>
      <description>&lt;P&gt;Hi Stephan,&lt;/P&gt;
&lt;P&gt;This is something that the compiler takes advantage of and the OCL kernel developer does not have control over. Hope that helps.&lt;/P&gt;
&lt;P&gt;Raghu&lt;/P&gt;</description>
      <pubDate>Mon, 13 May 2013 20:36:29 GMT</pubDate>
      <guid>https://community.intel.com/t5/OpenCL-for-CPU/Region-Addressing-in-openCL-kernel/m-p/951003#M1996</guid>
      <dc:creator>Raghupathi_M_Intel</dc:creator>
      <dc:date>2013-05-13T20:36:29Z</dc:date>
    </item>
    <item>
      <title>Hi Raghu</title>
      <link>https://community.intel.com/t5/OpenCL-for-CPU/Region-Addressing-in-openCL-kernel/m-p/951004#M1997</link>
      <description>&lt;P&gt;Hi Raghu&lt;BR /&gt;&lt;BR /&gt;Thank ypu a lot for the answer. Can we just wrap it up ?&lt;/P&gt;
&lt;P&gt;I think twiddling uses&amp;nbsp;direct region adressing, i.e. the element access&amp;nbsp;in the region is coded.&lt;BR /&gt;Im am right ? E.g.:&lt;BR /&gt;float4 a, b;&lt;BR /&gt;a.s0123 = b.s3210;&lt;/P&gt;
&lt;P&gt;(One could dissassemble the .ir to check the GPU asm, but I guess, this needs a certain VTune version ?)&lt;/P&gt;
&lt;P&gt;Which opencl C code statement would lead to an indirect region adressing by the compiler ?&lt;BR /&gt;Some array access ? Here my untested idea:&lt;BR /&gt;float4 dst;&lt;BR /&gt;float4 src[ 16 ];&lt;BR /&gt;int4 idx = ... ; // values within range 0..15&lt;BR /&gt;dst&amp;nbsp;= src[ idx ];&lt;/P&gt;
&lt;P&gt;Yes, it could be done also with several fetches. Would the compiler combine those into one inderect region adressing ?&lt;BR /&gt;dst.s0 = src[ idx.s0 ];&lt;BR /&gt;dst.s1 = src[ idx.s1 ];&lt;/P&gt;
&lt;P&gt;Best regards, Stephan&lt;/P&gt;</description>
      <pubDate>Tue, 14 May 2013 10:34:16 GMT</pubDate>
      <guid>https://community.intel.com/t5/OpenCL-for-CPU/Region-Addressing-in-openCL-kernel/m-p/951004#M1997</guid>
      <dc:creator>Stephan1</dc:creator>
      <dc:date>2013-05-14T10:34:16Z</dc:date>
    </item>
  </channel>
</rss>

