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    <title>topic Thanks, Raghu. This method is in OpenCL* for CPU</title>
    <link>https://community.intel.com/t5/OpenCL-for-CPU/Algnment-question/m-p/1029035#M3545</link>
    <description>&lt;P&gt;Thanks, Raghu. This method is called on the size of the host memory buffer before calling&lt;/P&gt;

&lt;P&gt;clCreateBuffer. &amp;nbsp;&lt;/P&gt;

&lt;P&gt;&lt;SPAN style="font-size: 1em; line-height: 1.5;"&gt;So, my question is: does the host memory have to be alligned to sizeof(void*)&lt;/SPAN&gt;&lt;/P&gt;

&lt;P&gt;before passing it into clCreateBuffer ? &amp;nbsp;I have a 64 bit system with sizeof(void*) equal to 8.&lt;/P&gt;

&lt;P&gt;Can I pass a buffer of size 14 into clCreateBuffer? &amp;nbsp;Is there a penalty if I do?&lt;/P&gt;

&lt;P&gt;Thanks,&lt;/P&gt;

&lt;P&gt;Aaron&lt;/P&gt;</description>
    <pubDate>Mon, 02 Jun 2014 19:51:39 GMT</pubDate>
    <dc:creator>ABoxe</dc:creator>
    <dc:date>2014-06-02T19:51:39Z</dc:date>
    <item>
      <title>Algnment question</title>
      <link>https://community.intel.com/t5/OpenCL-for-CPU/Algnment-question/m-p/1029033#M3543</link>
      <description>&lt;P&gt;&amp;nbsp; &amp;nbsp; In one of the sample apps, there is an align_malloc method.&lt;/P&gt;

&lt;P&gt;Inside, there is this assert:&lt;/P&gt;

&lt;P&gt;&lt;SPAN style="font-size: 1em; line-height: 1.5;"&gt;&amp;nbsp; &amp;nbsp; &amp;nbsp; assert(size/sizeof(void*)*sizeof(void*) == size);&lt;/SPAN&gt;&lt;/P&gt;

&lt;P&gt;Why must the memory size be divisible by sizeof(void*) &amp;nbsp;?&lt;/P&gt;

&lt;P&gt;Thanks,&lt;/P&gt;

&lt;P&gt;&lt;SPAN style="font-size: 1em; line-height: 1.5;"&gt;Aaron&lt;/SPAN&gt;&lt;/P&gt;</description>
      <pubDate>Sat, 31 May 2014 02:01:36 GMT</pubDate>
      <guid>https://community.intel.com/t5/OpenCL-for-CPU/Algnment-question/m-p/1029033#M3543</guid>
      <dc:creator>ABoxe</dc:creator>
      <dc:date>2014-05-31T02:01:36Z</dc:date>
    </item>
    <item>
      <title>From the code snippet looks</title>
      <link>https://community.intel.com/t5/OpenCL-for-CPU/Algnment-question/m-p/1029034#M3544</link>
      <description>&lt;P&gt;From the code snippet looks like the intention is to check and make sure "size" is aligned to the sizeof(void *).&lt;/P&gt;

&lt;P&gt;Thanks,&lt;BR /&gt;
	Raghu&lt;/P&gt;</description>
      <pubDate>Mon, 02 Jun 2014 18:50:09 GMT</pubDate>
      <guid>https://community.intel.com/t5/OpenCL-for-CPU/Algnment-question/m-p/1029034#M3544</guid>
      <dc:creator>Raghupathi_M_Intel</dc:creator>
      <dc:date>2014-06-02T18:50:09Z</dc:date>
    </item>
    <item>
      <title>Thanks, Raghu. This method is</title>
      <link>https://community.intel.com/t5/OpenCL-for-CPU/Algnment-question/m-p/1029035#M3545</link>
      <description>&lt;P&gt;Thanks, Raghu. This method is called on the size of the host memory buffer before calling&lt;/P&gt;

&lt;P&gt;clCreateBuffer. &amp;nbsp;&lt;/P&gt;

&lt;P&gt;&lt;SPAN style="font-size: 1em; line-height: 1.5;"&gt;So, my question is: does the host memory have to be alligned to sizeof(void*)&lt;/SPAN&gt;&lt;/P&gt;

&lt;P&gt;before passing it into clCreateBuffer ? &amp;nbsp;I have a 64 bit system with sizeof(void*) equal to 8.&lt;/P&gt;

&lt;P&gt;Can I pass a buffer of size 14 into clCreateBuffer? &amp;nbsp;Is there a penalty if I do?&lt;/P&gt;

&lt;P&gt;Thanks,&lt;/P&gt;

&lt;P&gt;Aaron&lt;/P&gt;</description>
      <pubDate>Mon, 02 Jun 2014 19:51:39 GMT</pubDate>
      <guid>https://community.intel.com/t5/OpenCL-for-CPU/Algnment-question/m-p/1029035#M3545</guid>
      <dc:creator>ABoxe</dc:creator>
      <dc:date>2014-06-02T19:51:39Z</dc:date>
    </item>
    <item>
      <title>In this case it looks like it</title>
      <link>https://community.intel.com/t5/OpenCL-for-CPU/Algnment-question/m-p/1029036#M3546</link>
      <description>&lt;P&gt;In this case it looks like it is a requirement (someone from the Xeon PHI team can correct me if I am wrong), but most of the times alignment is needed for performance reasons. You will get better performance if the data is aligned to, say, a cache line for example. On HD graphics you will get better performance if the buffer is aligned to a cache line and best performance if its aligned to a page boundary.&lt;/P&gt;

&lt;P&gt;You can find it the hard way. If your buffer is not aligned to sizeof(void *) and you get a crash in your application then you have to make sure this requirement is met. Otherwise it is for performance reasons.&lt;/P&gt;

&lt;P&gt;&amp;nbsp;&lt;/P&gt;</description>
      <pubDate>Mon, 02 Jun 2014 21:34:52 GMT</pubDate>
      <guid>https://community.intel.com/t5/OpenCL-for-CPU/Algnment-question/m-p/1029036#M3546</guid>
      <dc:creator>Raghupathi_M_Intel</dc:creator>
      <dc:date>2014-06-02T21:34:52Z</dc:date>
    </item>
    <item>
      <title>From the Xeon Phi prospective</title>
      <link>https://community.intel.com/t5/OpenCL-for-CPU/Algnment-question/m-p/1029037#M3547</link>
      <description>&lt;P&gt;From the Xeon Phi prospective you will get acceptable performance when buffers are aligned to 64 bytes. To get the best possible performance please align your buffers to 4K (standard x86 memory page). The same is right also for sub-buffers and Read/Write/Copy operations - if offsets are aligned properly the data transfer bandwidth is much higher.&lt;/P&gt;
&lt;P&gt;.&lt;/P&gt;</description>
      <pubDate>Tue, 03 Jun 2014 06:48:34 GMT</pubDate>
      <guid>https://community.intel.com/t5/OpenCL-for-CPU/Algnment-question/m-p/1029037#M3547</guid>
      <dc:creator>Dmitry_K_Intel</dc:creator>
      <dc:date>2014-06-03T06:48:34Z</dc:date>
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