https://community.intel.com/t5/OpenCL-for-CPU/Access-to-eDRAM/m-p/1064398#M4276 <P>How does one make use of eDRAM via OpenCL ? Is this simply transparent to the user, or are there ways of</P> <P>ensuring that data is stored in eDRAM vs. regular DRAM ?&nbsp; I am assuming that eDRAM is treated as global memory.</P> <P>Thanks!</P> <P>Aaron</P> Tue, 17 May 2016 02:57:41 GMT ABoxe 2016-05-17T02:57:41Z https://community.intel.com/t5/OpenCL-for-CPU/Access-to-eDRAM/m-p/1064398#M4276 <P>How does one make use of eDRAM via OpenCL ? Is this simply transparent to the user, or are there ways of</P> <P>ensuring that data is stored in eDRAM vs. regular DRAM ?&nbsp; I am assuming that eDRAM is treated as global memory.</P> <P>Thanks!</P> <P>Aaron</P> Tue, 17 May 2016 02:57:41 GMT https://community.intel.com/t5/OpenCL-for-CPU/Access-to-eDRAM/m-p/1064398#M4276 ABoxe 2016-05-17T02:57:41Z https://community.intel.com/t5/OpenCL-for-CPU/Access-to-eDRAM/m-p/1064399#M4277 <P>Hi Aaron,</P> <P>eDRAM is an eviction cache in 5th gen cores (Broadwell) timeframe and acts as a regular cache in 6th gen cores (Skylake). eDRAM is part of global memory and is transparent to the user, so if you have it, if all your buffers fit in eDRAM, you will have your buffers there.</P> Tue, 17 May 2016 21:54:13 GMT https://community.intel.com/t5/OpenCL-for-CPU/Access-to-eDRAM/m-p/1064399#M4277 Robert_I_Intel 2016-05-17T21:54:13Z https://community.intel.com/t5/OpenCL-for-CPU/Access-to-eDRAM/m-p/1064400#M4278 <P>Great, thanks Robert.</P> Tue, 17 May 2016 22:30:49 GMT https://community.intel.com/t5/OpenCL-for-CPU/Access-to-eDRAM/m-p/1064400#M4278 ABoxe 2016-05-17T22:30:49Z