<?xml version="1.0" encoding="UTF-8"?>
<rss xmlns:content="http://purl.org/rss/1.0/modules/content/" xmlns:dc="http://purl.org/dc/elements/1.1/" xmlns:rdf="http://www.w3.org/1999/02/22-rdf-syntax-ns#" xmlns:taxo="http://purl.org/rss/1.0/modules/taxonomy/" version="2.0">
  <channel>
    <title>topic How to figure out the work group to EU mapping? in OpenCL* for CPU</title>
    <link>https://community.intel.com/t5/OpenCL-for-CPU/How-to-figure-out-the-work-group-to-EU-mapping/m-p/1072862#M4498</link>
    <description>&lt;P&gt;&lt;SPAN style="font-size: 1em;"&gt;Hi everyone:&lt;/SPAN&gt;&lt;/P&gt;

&lt;P&gt;&amp;nbsp;&lt;/P&gt;

&lt;P&gt;&amp;nbsp; &amp;nbsp; &amp;nbsp; Is there a way to figure out the work group to EU mapping? More specifically, is there any registers containing EU IDs available in EU, that the kernel can read &amp;nbsp;during the execution?&lt;/P&gt;

&lt;P&gt;&amp;nbsp; &amp;nbsp; &amp;nbsp; Thanks!&lt;/P&gt;

&lt;P&gt;Dong&lt;/P&gt;

&lt;P&gt;&amp;nbsp;&lt;/P&gt;</description>
    <pubDate>Wed, 02 Nov 2016 17:17:20 GMT</pubDate>
    <dc:creator>Dong_C_2</dc:creator>
    <dc:date>2016-11-02T17:17:20Z</dc:date>
    <item>
      <title>How to figure out the work group to EU mapping?</title>
      <link>https://community.intel.com/t5/OpenCL-for-CPU/How-to-figure-out-the-work-group-to-EU-mapping/m-p/1072862#M4498</link>
      <description>&lt;P&gt;&lt;SPAN style="font-size: 1em;"&gt;Hi everyone:&lt;/SPAN&gt;&lt;/P&gt;

&lt;P&gt;&amp;nbsp;&lt;/P&gt;

&lt;P&gt;&amp;nbsp; &amp;nbsp; &amp;nbsp; Is there a way to figure out the work group to EU mapping? More specifically, is there any registers containing EU IDs available in EU, that the kernel can read &amp;nbsp;during the execution?&lt;/P&gt;

&lt;P&gt;&amp;nbsp; &amp;nbsp; &amp;nbsp; Thanks!&lt;/P&gt;

&lt;P&gt;Dong&lt;/P&gt;

&lt;P&gt;&amp;nbsp;&lt;/P&gt;</description>
      <pubDate>Wed, 02 Nov 2016 17:17:20 GMT</pubDate>
      <guid>https://community.intel.com/t5/OpenCL-for-CPU/How-to-figure-out-the-work-group-to-EU-mapping/m-p/1072862#M4498</guid>
      <dc:creator>Dong_C_2</dc:creator>
      <dc:date>2016-11-02T17:17:20Z</dc:date>
    </item>
    <item>
      <title>As far as I know there is no</title>
      <link>https://community.intel.com/t5/OpenCL-for-CPU/How-to-figure-out-the-work-group-to-EU-mapping/m-p/1072863#M4499</link>
      <description>&lt;P&gt;As far as I know there is no way to do this in OpenCL.&amp;nbsp; While there are many system queries you can do during initialization to learn about the type of system the code is running on, I have not heard of any way that a kernel can learn about the ID if a specific EU it is running on.&amp;nbsp;&lt;/P&gt;

&lt;P&gt;What is your final goal?&amp;nbsp; Perhaps if we knew more about that we could provide more options.&lt;/P&gt;</description>
      <pubDate>Wed, 02 Nov 2016 22:21:23 GMT</pubDate>
      <guid>https://community.intel.com/t5/OpenCL-for-CPU/How-to-figure-out-the-work-group-to-EU-mapping/m-p/1072863#M4499</guid>
      <dc:creator>Jeffrey_M_Intel1</dc:creator>
      <dc:date>2016-11-02T22:21:23Z</dc:date>
    </item>
    <item>
      <title>Hi Jeffrey:</title>
      <link>https://community.intel.com/t5/OpenCL-for-CPU/How-to-figure-out-the-work-group-to-EU-mapping/m-p/1072864#M4500</link>
      <description>&lt;P&gt;&lt;SPAN style="font-size: 1em;"&gt;Hi Jeffrey:&lt;/SPAN&gt;&lt;/P&gt;

&lt;P&gt;&lt;SPAN style="font-size: 1em;"&gt;&amp;nbsp;&amp;nbsp; &amp;nbsp; Thanks for your prompt reply.&lt;/SPAN&gt;&lt;/P&gt;

&lt;P&gt;&lt;SPAN style="font-size: 1em;"&gt;&amp;nbsp;&amp;nbsp; &amp;nbsp; The final goal for me is that I would like to figure out how the hardware scheduler schedules the work groups to EUs. If the kernel can read the EU IDs during execution,&amp;nbsp;&lt;/SPAN&gt;probably that will solve my problem.&amp;nbsp;&lt;/P&gt;

&lt;P&gt;&amp;nbsp; &amp;nbsp; &amp;nbsp;In this afternoon, I found that register SR0 contains EUIDs. If I get the address of that register and inline assembly code into the kernel by __asm__(), possibly that can do it. Not sure yet, I will try to find out the address of SR0 and then see whether this works.&lt;/P&gt;

&lt;P&gt;&lt;SPAN style="font-size: 1em;"&gt;&amp;nbsp; &amp;nbsp; Thanks! Other options and thoughts about this are welcome!&lt;/SPAN&gt;&lt;/P&gt;

&lt;P&gt;&lt;SPAN style="font-size: 1em;"&gt;Dong&amp;nbsp;&lt;/SPAN&gt;&lt;/P&gt;

&lt;P&gt;&amp;nbsp;&lt;/P&gt;</description>
      <pubDate>Wed, 02 Nov 2016 23:46:02 GMT</pubDate>
      <guid>https://community.intel.com/t5/OpenCL-for-CPU/How-to-figure-out-the-work-group-to-EU-mapping/m-p/1072864#M4500</guid>
      <dc:creator>Dong_C_2</dc:creator>
      <dc:date>2016-11-02T23:46:02Z</dc:date>
    </item>
    <item>
      <title>Knowing the EU id is a useful</title>
      <link>https://community.intel.com/t5/OpenCL-for-CPU/How-to-figure-out-the-work-group-to-EU-mapping/m-p/1072865#M4501</link>
      <description>&lt;P&gt;Knowing the EU and hardware thread IDs would be a useful feature. &amp;nbsp;It's probably way out of spec for current revisions of OpenCL but might be an easy intel_cl extension?&lt;/P&gt;

&lt;P&gt;Note this can be done in CUDA by reading the %smid% special register (but the IDs aren't always sequential).&lt;/P&gt;

&lt;P&gt;My observations so far lead me to believe that a GEN workgroup has its subgroups assigned&amp;nbsp;&lt;EM&gt;across&lt;/EM&gt;&amp;nbsp;each EU in the subslice.&lt;/P&gt;

&lt;P&gt;That is, if you have a workgroup with 8 subgroups on a Gen8+ IGP then one subgroup will be assigned to each EU in the subslice.&lt;/P&gt;

&lt;P&gt;Your mileage may vary.&lt;/P&gt;

&lt;P&gt;If you just want controlled scheduling of work onto a partial subslice, then a workaround for what you're asking for might be to implement your kernel with a "&lt;A href="https://www.google.com/webhp?sourceid=chrome-instant&amp;amp;ion=1&amp;amp;espv=2&amp;amp;ie=UTF-8#q=grid%20stride%20loop"&gt;grid-stride loop&lt;/A&gt;". &amp;nbsp;Note that for some strange reason, a subslice has more total EU threads than you can possibly cover with a single workgroup so you may have to use two workgroups to fully cover a subslice.&lt;/P&gt;

&lt;P&gt;&amp;nbsp;&lt;/P&gt;</description>
      <pubDate>Thu, 03 Nov 2016 00:09:00 GMT</pubDate>
      <guid>https://community.intel.com/t5/OpenCL-for-CPU/How-to-figure-out-the-work-group-to-EU-mapping/m-p/1072865#M4501</guid>
      <dc:creator>allanmac1</dc:creator>
      <dc:date>2016-11-03T00:09:00Z</dc:date>
    </item>
  </channel>
</rss>

