<?xml version="1.0" encoding="UTF-8"?>
<rss xmlns:content="http://purl.org/rss/1.0/modules/content/" xmlns:dc="http://purl.org/dc/elements/1.1/" xmlns:rdf="http://www.w3.org/1999/02/22-rdf-syntax-ns#" xmlns:taxo="http://purl.org/rss/1.0/modules/taxonomy/" version="2.0">
  <channel>
    <title>topic vec_type_hint() does not work for me in OpenCL* for CPU</title>
    <link>https://community.intel.com/t5/OpenCL-for-CPU/vec-type-hint-does-not-work-for-me/m-p/1124478#M5575</link>
    <description>&lt;P&gt;trying to disable auto-vectorization, I used&amp;nbsp;&lt;SPAN style="font-size: 13.008px; line-height: 19.512px;"&gt;vec_type_hint(char) as below. &amp;nbsp;But checking the built assembly code, I see the kernel is still compiled as SIMD32. &amp;nbsp;Any advice?&lt;/SPAN&gt;&lt;/P&gt;

&lt;P&gt;&amp;nbsp;&lt;/P&gt;

&lt;P&gt;__kernel __attribute__((vec_type_hint(uchar))) &amp;nbsp;void modulate_v1_uchar(global const uchar *pSrc, global &amp;nbsp;uchar *pDst)&amp;nbsp;&lt;BR /&gt;
	//__kernel void modulate_v1_uchar(global const uchar *pSrc, global &amp;nbsp;uchar *pDst)&amp;nbsp;&lt;BR /&gt;
	{&amp;nbsp;&lt;/P&gt;

&lt;P&gt;&amp;nbsp;&amp;nbsp; &amp;nbsp;uint idx = get_global_id(0);&lt;/P&gt;

&lt;P&gt;&amp;nbsp;&amp;nbsp; &amp;nbsp;uchar src = pSrc[idx];&lt;BR /&gt;
	&amp;nbsp;&amp;nbsp; &amp;nbsp;src &amp;gt;&amp;gt;= MODULATE_SHIFT_FACTOR;&lt;BR /&gt;
	&amp;nbsp;&amp;nbsp; &amp;nbsp;pDst[idx] = src;&lt;BR /&gt;
	}&lt;/P&gt;</description>
    <pubDate>Thu, 12 May 2016 21:08:44 GMT</pubDate>
    <dc:creator>Fu_J_Intel</dc:creator>
    <dc:date>2016-05-12T21:08:44Z</dc:date>
    <item>
      <title>vec_type_hint() does not work for me</title>
      <link>https://community.intel.com/t5/OpenCL-for-CPU/vec-type-hint-does-not-work-for-me/m-p/1124478#M5575</link>
      <description>&lt;P&gt;trying to disable auto-vectorization, I used&amp;nbsp;&lt;SPAN style="font-size: 13.008px; line-height: 19.512px;"&gt;vec_type_hint(char) as below. &amp;nbsp;But checking the built assembly code, I see the kernel is still compiled as SIMD32. &amp;nbsp;Any advice?&lt;/SPAN&gt;&lt;/P&gt;

&lt;P&gt;&amp;nbsp;&lt;/P&gt;

&lt;P&gt;__kernel __attribute__((vec_type_hint(uchar))) &amp;nbsp;void modulate_v1_uchar(global const uchar *pSrc, global &amp;nbsp;uchar *pDst)&amp;nbsp;&lt;BR /&gt;
	//__kernel void modulate_v1_uchar(global const uchar *pSrc, global &amp;nbsp;uchar *pDst)&amp;nbsp;&lt;BR /&gt;
	{&amp;nbsp;&lt;/P&gt;

&lt;P&gt;&amp;nbsp;&amp;nbsp; &amp;nbsp;uint idx = get_global_id(0);&lt;/P&gt;

&lt;P&gt;&amp;nbsp;&amp;nbsp; &amp;nbsp;uchar src = pSrc[idx];&lt;BR /&gt;
	&amp;nbsp;&amp;nbsp; &amp;nbsp;src &amp;gt;&amp;gt;= MODULATE_SHIFT_FACTOR;&lt;BR /&gt;
	&amp;nbsp;&amp;nbsp; &amp;nbsp;pDst[idx] = src;&lt;BR /&gt;
	}&lt;/P&gt;</description>
      <pubDate>Thu, 12 May 2016 21:08:44 GMT</pubDate>
      <guid>https://community.intel.com/t5/OpenCL-for-CPU/vec-type-hint-does-not-work-for-me/m-p/1124478#M5575</guid>
      <dc:creator>Fu_J_Intel</dc:creator>
      <dc:date>2016-05-12T21:08:44Z</dc:date>
    </item>
    <item>
      <title>You won't be able to disable</title>
      <link>https://community.intel.com/t5/OpenCL-for-CPU/vec-type-hint-does-not-work-for-me/m-p/1124479#M5576</link>
      <description>&lt;P&gt;You won't be able to disable vectorization on the GPU. That hint is for the CPU. You could use&amp;nbsp;&lt;SPAN style="color: rgb(0, 0, 0); font-family: 'courier new', monospace; font-size: 16px; line-height: normal;"&gt;_attribute__((reqd_work_gr oup_size(X, Y, Z)))&amp;nbsp;&lt;/SPAN&gt;&lt;SPAN style="font-size: 13.008px; line-height: 19.512px;"&gt;could&amp;nbsp;&lt;/SPAN&gt;to change SIMD width to 8 (8, 1, 1), 16 (16, 1, 1) or 32 (32, 1, 1)&lt;/P&gt;</description>
      <pubDate>Fri, 13 May 2016 01:46:29 GMT</pubDate>
      <guid>https://community.intel.com/t5/OpenCL-for-CPU/vec-type-hint-does-not-work-for-me/m-p/1124479#M5576</guid>
      <dc:creator>Robert_I_Intel</dc:creator>
      <dc:date>2016-05-13T01:46:29Z</dc:date>
    </item>
    <item>
      <title>great! thanks Robert.</title>
      <link>https://community.intel.com/t5/OpenCL-for-CPU/vec-type-hint-does-not-work-for-me/m-p/1124480#M5577</link>
      <description>&lt;P&gt;great! thanks Robert.&lt;/P&gt;</description>
      <pubDate>Fri, 13 May 2016 05:46:42 GMT</pubDate>
      <guid>https://community.intel.com/t5/OpenCL-for-CPU/vec-type-hint-does-not-work-for-me/m-p/1124480#M5577</guid>
      <dc:creator>Fu_J_Intel</dc:creator>
      <dc:date>2016-05-13T05:46:42Z</dc:date>
    </item>
    <item>
      <title>I actually have a further</title>
      <link>https://community.intel.com/t5/OpenCL-for-CPU/vec-type-hint-does-not-work-for-me/m-p/1124481#M5578</link>
      <description>&lt;P&gt;I actually have a further question: &amp;nbsp;how is workgroup size (eg, &amp;nbsp;&lt;SPAN style="font-size: 12px; line-height: 18px;"&gt;_attribute__((reqd_work_gr oup_size(X, Y, Z)))) &amp;nbsp;related to SIMD width? &amp;nbsp;does it mean work-item of different workgroups can not be handled on the same thread? &amp;nbsp;Thanks&lt;/SPAN&gt;&lt;/P&gt;

&lt;P&gt;&amp;nbsp;&lt;/P&gt;

&lt;P&gt;&amp;nbsp;&lt;/P&gt;</description>
      <pubDate>Fri, 13 May 2016 18:36:44 GMT</pubDate>
      <guid>https://community.intel.com/t5/OpenCL-for-CPU/vec-type-hint-does-not-work-for-me/m-p/1124481#M5578</guid>
      <dc:creator>Fu_J_Intel</dc:creator>
      <dc:date>2016-05-13T18:36:44Z</dc:date>
    </item>
    <item>
      <title>Yes, typically a work-group</title>
      <link>https://community.intel.com/t5/OpenCL-for-CPU/vec-type-hint-does-not-work-for-me/m-p/1124482#M5579</link>
      <description>&lt;P&gt;Yes, typically a work-group maps to a hardware thread or can span multiple threads or even multiple EUs.&lt;A href="https://community.intel.com/legacyfs/online/drupal_files/505229"&gt;505229&lt;/A&gt;&lt;/P&gt;</description>
      <pubDate>Sat, 14 May 2016 00:12:13 GMT</pubDate>
      <guid>https://community.intel.com/t5/OpenCL-for-CPU/vec-type-hint-does-not-work-for-me/m-p/1124482#M5579</guid>
      <dc:creator>Robert_I_Intel</dc:creator>
      <dc:date>2016-05-14T00:12:13Z</dc:date>
    </item>
    <item>
      <title>See slides 18 thru 34 in the</title>
      <link>https://community.intel.com/t5/OpenCL-for-CPU/vec-type-hint-does-not-work-for-me/m-p/1124483#M5580</link>
      <description>&lt;P&gt;See slides 18 thru 34 in the presentation above.&lt;/P&gt;</description>
      <pubDate>Sat, 14 May 2016 00:13:11 GMT</pubDate>
      <guid>https://community.intel.com/t5/OpenCL-for-CPU/vec-type-hint-does-not-work-for-me/m-p/1124483#M5580</guid>
      <dc:creator>Robert_I_Intel</dc:creator>
      <dc:date>2016-05-14T00:13:11Z</dc:date>
    </item>
  </channel>
</rss>

