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    <title>topic This problem was resolved.  I in OpenCL* for CPU</title>
    <link>https://community.intel.com/t5/OpenCL-for-CPU/Compiling-kernel-on-HD-505-Apollo-Lake/m-p/1180072#M6689</link>
    <description>&lt;P&gt;This problem was resolved. &amp;nbsp;I removed the "-std-cl=..." option from the clBuildProgram() and the problem went away.&lt;/P&gt;

&lt;P&gt;I can also confirm the HD505 performs really really well with my compute kernels!&lt;/P&gt;</description>
    <pubDate>Wed, 13 Sep 2017 20:22:00 GMT</pubDate>
    <dc:creator>allanmac1</dc:creator>
    <dc:date>2017-09-13T20:22:00Z</dc:date>
    <item>
      <title>Compiling kernel on HD 505 (Apollo Lake)</title>
      <link>https://community.intel.com/t5/OpenCL-for-CPU/Compiling-kernel-on-HD-505-Apollo-Lake/m-p/1180071#M6688</link>
      <description>&lt;P&gt;How should I interpret this error?&lt;/P&gt;

&lt;P&gt;I'm compiling an OpenCL 1.2 kernel from source. &amp;nbsp;It compiles fine on a HD 530/x64/Skylake device.&lt;/P&gt;

&lt;P&gt;But I'm seeing these errors when compiling the same kernel source on an HD 505 / N4200 / x64 executable.&lt;/P&gt;

&lt;PRE class="brush:plain;"&gt;warning: Linking two modules of different data layouts: '' is 'e-p:32:32-i64:64-v16:16-v24:32-v32:32-v48:64-v96:128-v192:256-v256:256-v512:512-v1024:1024' whereas '&amp;lt;origin&amp;gt;' is 'e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v16:16:16-v24:32:32-v32:32:32-v48:64:64-v64:64:64-v96:128:128-v128:128:128-v192:256:256-v256:256:256-v512:512:512-v1024:1024:1024-n8:16:32:64'

warning: Linking two modules of different target triples: ' is 'spir' whereas '&amp;lt;origin&amp;gt;' is 'vISA_32'

warning: Linking two modules of different data layouts: '' is 'e-p:32:32-i64:64-v16:16-v24:32-v32:32-v48:64-v96:128-v192:256-v256:256-v512:512-v1024:1024' whereas '&amp;lt;origin&amp;gt;' is 'e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v16:16:16-v24:32:32-v32:32:32-v48:64:64-v64:64:64-v96:128:128-v128:128:128-v192:256:256-v256:256:256-v512:512:512-v1024:1024:1024-n8:16:32:64'

warning: Linking two modules of different target triples: ' is 'spir' whereas '&amp;lt;origin&amp;gt;' is 'vISA_32'
&lt;/PRE&gt;

&lt;P&gt;&amp;nbsp;&lt;/P&gt;</description>
      <pubDate>Sat, 09 Sep 2017 03:13:00 GMT</pubDate>
      <guid>https://community.intel.com/t5/OpenCL-for-CPU/Compiling-kernel-on-HD-505-Apollo-Lake/m-p/1180071#M6688</guid>
      <dc:creator>allanmac1</dc:creator>
      <dc:date>2017-09-09T03:13:00Z</dc:date>
    </item>
    <item>
      <title>This problem was resolved.  I</title>
      <link>https://community.intel.com/t5/OpenCL-for-CPU/Compiling-kernel-on-HD-505-Apollo-Lake/m-p/1180072#M6689</link>
      <description>&lt;P&gt;This problem was resolved. &amp;nbsp;I removed the "-std-cl=..." option from the clBuildProgram() and the problem went away.&lt;/P&gt;

&lt;P&gt;I can also confirm the HD505 performs really really well with my compute kernels!&lt;/P&gt;</description>
      <pubDate>Wed, 13 Sep 2017 20:22:00 GMT</pubDate>
      <guid>https://community.intel.com/t5/OpenCL-for-CPU/Compiling-kernel-on-HD-505-Apollo-Lake/m-p/1180072#M6689</guid>
      <dc:creator>allanmac1</dc:creator>
      <dc:date>2017-09-13T20:22:00Z</dc:date>
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