<?xml version="1.0" encoding="UTF-8"?>
<rss xmlns:content="http://purl.org/rss/1.0/modules/content/" xmlns:dc="http://purl.org/dc/elements/1.1/" xmlns:rdf="http://www.w3.org/1999/02/22-rdf-syntax-ns#" xmlns:taxo="http://purl.org/rss/1.0/modules/taxonomy/" version="2.0">
  <channel>
    <title>topic Ok, I have posted the in Intel® Optimized AI Frameworks</title>
    <link>https://community.intel.com/t5/Intel-Optimized-AI-Frameworks/m512i-array/m-p/1132317#M28</link>
    <description>&lt;P&gt;Ok, I have posted&amp;nbsp;the question in the forum.&lt;/P&gt;</description>
    <pubDate>Thu, 12 Mar 2020 01:24:05 GMT</pubDate>
    <dc:creator>lin__chiungliang</dc:creator>
    <dc:date>2020-03-12T01:24:05Z</dc:date>
    <item>
      <title>__m512i array</title>
      <link>https://community.intel.com/t5/Intel-Optimized-AI-Frameworks/m512i-array/m-p/1132311#M22</link>
      <description>&lt;P&gt;I'm trying to write code by VNNI&lt;/P&gt;&lt;P&gt;There is a data type - __m512i&lt;/P&gt;&lt;P&gt;which I think is mapping to registers on CPU.&lt;/P&gt;&lt;P&gt;I'd like to locate an array of registers&lt;/P&gt;&lt;P&gt;Here is the code&lt;/P&gt;
&lt;PRE class="brush:cpp; class-name:dark;"&gt;#include &amp;lt;immintrin.h&amp;gt;
int main()
{
        const int size = 5;

        __m512i zero[size];

        for(int i=0; i&amp;lt;size; i++)
        {
                zero&lt;I&gt; = _mm512_setzero_si512();
        }

        return 0;
}
&lt;/I&gt;&lt;/PRE&gt;

&lt;P&gt;It works.&lt;/P&gt;
&lt;P&gt;But when I try dynamic allocate memory&lt;/P&gt;
&lt;P&gt;It doesn't work&lt;/P&gt;

&lt;PRE class="brush:cpp; class-name:dark;"&gt;#include &amp;lt;immintrin.h&amp;gt;
int main()
{
        const int size = 5;

        __m512i *zero = new __m512i[size];

        for(int i=0; i&amp;lt;size; i++)
        {
                zero&lt;I&gt; = _mm512_setzero_si512();
        }

        delete [] zero;

        return 0;
}
&lt;/I&gt;&lt;/PRE&gt;

&lt;P&gt;Is there any way to create registers dynamically?&lt;/P&gt;
&lt;P&gt;Lot of thanks&lt;/P&gt;
&lt;P&gt;BR,&lt;/P&gt;
&lt;P&gt;chiungliang&lt;/P&gt;</description>
      <pubDate>Wed, 26 Feb 2020 09:41:30 GMT</pubDate>
      <guid>https://community.intel.com/t5/Intel-Optimized-AI-Frameworks/m512i-array/m-p/1132311#M22</guid>
      <dc:creator>lin__chiungliang</dc:creator>
      <dc:date>2020-02-26T09:41:30Z</dc:date>
    </item>
    <item>
      <title>Hi Chiungliang</title>
      <link>https://community.intel.com/t5/Intel-Optimized-AI-Frameworks/m512i-array/m-p/1132312#M23</link>
      <description>&lt;P&gt;Hi Chiungliang&lt;/P&gt;&lt;P&gt;We are forwarding your case to SME&amp;nbsp; to check.&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;&lt;BR /&gt;Arun Jose&lt;/P&gt;</description>
      <pubDate>Wed, 26 Feb 2020 10:21:00 GMT</pubDate>
      <guid>https://community.intel.com/t5/Intel-Optimized-AI-Frameworks/m512i-array/m-p/1132312#M23</guid>
      <dc:creator>ArunJ_Intel</dc:creator>
      <dc:date>2020-02-26T10:21:00Z</dc:date>
    </item>
    <item>
      <title>Hi,</title>
      <link>https://community.intel.com/t5/Intel-Optimized-AI-Frameworks/m512i-array/m-p/1132313#M24</link>
      <description>&lt;P&gt;Hi,&lt;/P&gt;&lt;P&gt;Is there any update?&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;chiungliang&lt;/P&gt;</description>
      <pubDate>Mon, 02 Mar 2020 02:01:53 GMT</pubDate>
      <guid>https://community.intel.com/t5/Intel-Optimized-AI-Frameworks/m512i-array/m-p/1132313#M24</guid>
      <dc:creator>lin__chiungliang</dc:creator>
      <dc:date>2020-03-02T02:01:53Z</dc:date>
    </item>
    <item>
      <title>Hi </title>
      <link>https://community.intel.com/t5/Intel-Optimized-AI-Frameworks/m512i-array/m-p/1132314#M25</link>
      <description>&lt;P&gt;Hi&amp;nbsp;&lt;/P&gt;&lt;P&gt;Before we dive into this intrinsic question, can you explain why you mention VNNI here?&lt;/P&gt;&lt;P&gt;the intrinsic call may not involve VNNI instruction like&amp;nbsp;vpdpbusd.&lt;/P&gt;&lt;P&gt;For VNNI intrinsic function, you can refer below wiki for detail.&lt;/P&gt;&lt;P&gt;&lt;A href="https://en.wikichip.org/wiki/x86/avx512vnni" target="_blank"&gt;https://en.wikichip.org/wiki/x86/avx512vnni&lt;/A&gt;&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;</description>
      <pubDate>Thu, 05 Mar 2020 06:50:10 GMT</pubDate>
      <guid>https://community.intel.com/t5/Intel-Optimized-AI-Frameworks/m512i-array/m-p/1132314#M25</guid>
      <dc:creator>Louie_T_Intel</dc:creator>
      <dc:date>2020-03-05T06:50:10Z</dc:date>
    </item>
    <item>
      <title>Hi,</title>
      <link>https://community.intel.com/t5/Intel-Optimized-AI-Frameworks/m512i-array/m-p/1132315#M26</link>
      <description>&lt;P&gt;Hi,&lt;/P&gt;&lt;P&gt;I tried to do MAC operation, and the first step is to reset registers.&lt;/P&gt;&lt;P&gt;Here is the code of the first step only.&lt;/P&gt;&lt;P&gt;Since I want to introduce "batch", which is defined as "the number of reused time", in my code.&lt;/P&gt;&lt;P&gt;I'd like to allocate registers dynamically.&lt;/P&gt;</description>
      <pubDate>Thu, 05 Mar 2020 07:07:58 GMT</pubDate>
      <guid>https://community.intel.com/t5/Intel-Optimized-AI-Frameworks/m512i-array/m-p/1132315#M26</guid>
      <dc:creator>lin__chiungliang</dc:creator>
      <dc:date>2020-03-05T07:07:58Z</dc:date>
    </item>
    <item>
      <title>Hi chiungliang</title>
      <link>https://community.intel.com/t5/Intel-Optimized-AI-Frameworks/m512i-array/m-p/1132316#M27</link>
      <description>&lt;P&gt;Hi chiungliang&lt;/P&gt;&lt;P&gt;sorry for late response.&lt;/P&gt;&lt;P&gt;this question is more related to general compiler issue, and it would be better to let our compiler experts to answer this question.&lt;/P&gt;&lt;P&gt;This forum can help on DL libraries and framework related questions, but you should get better support for intrinsic programming in compiler forum.&lt;/P&gt;&lt;P&gt;Would you mind posting the same question in below forum?&lt;/P&gt;&lt;P&gt;&lt;A href="https://software.intel.com/en-us/forums/intel-c-compiler"&gt;https://software.intel.com/en-us/forums/intel-c-compiler&lt;/A&gt;&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;thanks&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;</description>
      <pubDate>Wed, 11 Mar 2020 17:49:07 GMT</pubDate>
      <guid>https://community.intel.com/t5/Intel-Optimized-AI-Frameworks/m512i-array/m-p/1132316#M27</guid>
      <dc:creator>Louie_T_Intel</dc:creator>
      <dc:date>2020-03-11T17:49:07Z</dc:date>
    </item>
    <item>
      <title>Ok, I have posted the</title>
      <link>https://community.intel.com/t5/Intel-Optimized-AI-Frameworks/m512i-array/m-p/1132317#M28</link>
      <description>&lt;P&gt;Ok, I have posted&amp;nbsp;the question in the forum.&lt;/P&gt;</description>
      <pubDate>Thu, 12 Mar 2020 01:24:05 GMT</pubDate>
      <guid>https://community.intel.com/t5/Intel-Optimized-AI-Frameworks/m512i-array/m-p/1132317#M28</guid>
      <dc:creator>lin__chiungliang</dc:creator>
      <dc:date>2020-03-12T01:24:05Z</dc:date>
    </item>
    <item>
      <title>Closing this case as it is</title>
      <link>https://community.intel.com/t5/Intel-Optimized-AI-Frameworks/m512i-array/m-p/1132318#M29</link>
      <description>&lt;P&gt;Closing this case as it is adressed in intel-c-compiler forum. Link to question is given below&lt;/P&gt;&lt;P&gt;&lt;A href="https://software.intel.com/en-us/forums/intel-c-compiler/topic/849942"&gt;https://software.intel.com/en-us/forums/intel-c-compiler/topic/849942&lt;/A&gt;&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;</description>
      <pubDate>Tue, 17 Mar 2020 07:22:09 GMT</pubDate>
      <guid>https://community.intel.com/t5/Intel-Optimized-AI-Frameworks/m512i-array/m-p/1132318#M29</guid>
      <dc:creator>ArunJ_Intel</dc:creator>
      <dc:date>2020-03-17T07:22:09Z</dc:date>
    </item>
  </channel>
</rss>

