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    <title>topic L1 and L2 cache in Mobile and Desktop Processors</title>
    <link>https://community.intel.com/t5/Mobile-and-Desktop-Processors/L1-and-L2-cache/m-p/209973#M1141</link>
    <description>&lt;P&gt;Hello,&lt;/P&gt;&lt;P&gt;I'd like to know the L1 and L2 cache of the following CPU's:&lt;/P&gt;&lt;P&gt;a) Xeon E5-2630L&lt;/P&gt;&lt;P&gt;b) Xeon L5640&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;I'd also like to know whether they support SHA-1 encryption&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Thanks a lot,&lt;/P&gt;</description>
    <pubDate>Thu, 29 Mar 2012 09:16:05 GMT</pubDate>
    <dc:creator>idata</dc:creator>
    <dc:date>2012-03-29T09:16:05Z</dc:date>
    <item>
      <title>L1 and L2 cache</title>
      <link>https://community.intel.com/t5/Mobile-and-Desktop-Processors/L1-and-L2-cache/m-p/209973#M1141</link>
      <description>&lt;P&gt;Hello,&lt;/P&gt;&lt;P&gt;I'd like to know the L1 and L2 cache of the following CPU's:&lt;/P&gt;&lt;P&gt;a) Xeon E5-2630L&lt;/P&gt;&lt;P&gt;b) Xeon L5640&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;I'd also like to know whether they support SHA-1 encryption&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Thanks a lot,&lt;/P&gt;</description>
      <pubDate>Thu, 29 Mar 2012 09:16:05 GMT</pubDate>
      <guid>https://community.intel.com/t5/Mobile-and-Desktop-Processors/L1-and-L2-cache/m-p/209973#M1141</guid>
      <dc:creator>idata</dc:creator>
      <dc:date>2012-03-29T09:16:05Z</dc:date>
    </item>
    <item>
      <title>Re: L1 and L2 cache</title>
      <link>https://community.intel.com/t5/Mobile-and-Desktop-Processors/L1-and-L2-cache/m-p/209974#M1142</link>
      <description>&lt;P&gt;Both processors have the following L1 and L2 cache:&lt;/P&gt;&lt;P&gt;L1 = 32 KB&lt;/P&gt;&lt;P&gt;L2 = 256 KB&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;The L1 and L2 cache size is standard, so all current available Intel processors have this same configuration.&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Please check page 14 at:&lt;/P&gt;&lt;P&gt;&lt;A href="http://www.intel.com/content/www/us/en/processors/xeon/xeon-e5-1600-2600-vol-1-datasheet.html"&gt;http://www.intel.com/content/www/us/en/processors/xeon/xeon-e5-1600-2600-vol-1-datasheet.html&lt;/A&gt; &lt;A href="http://www.intel.com/content/www/us/en/processors/xeon/xeon-e5-1600-2600-vol-1-datasheet.html"&gt;http://www.intel.com/content/www/us/en/processors/xeon/xeon-e5-1600-2600-vol-1-datasheet.html&lt;/A&gt;&lt;/P&gt;</description>
      <pubDate>Thu, 29 Mar 2012 14:18:18 GMT</pubDate>
      <guid>https://community.intel.com/t5/Mobile-and-Desktop-Processors/L1-and-L2-cache/m-p/209974#M1142</guid>
      <dc:creator>Adolfo_S_Intel2</dc:creator>
      <dc:date>2012-03-29T14:18:18Z</dc:date>
    </item>
    <item>
      <title>Re: L1 and L2 cache</title>
      <link>https://community.intel.com/t5/Mobile-and-Desktop-Processors/L1-and-L2-cache/m-p/209975#M1143</link>
      <description>&lt;P&gt;Thanks Adolfo.&lt;/P&gt;&lt;P&gt;What about SHA-1 encryption? Do they support it?&lt;/P&gt;</description>
      <pubDate>Thu, 29 Mar 2012 15:12:35 GMT</pubDate>
      <guid>https://community.intel.com/t5/Mobile-and-Desktop-Processors/L1-and-L2-cache/m-p/209975#M1143</guid>
      <dc:creator>idata</dc:creator>
      <dc:date>2012-03-29T15:12:35Z</dc:date>
    </item>
    <item>
      <title>Re: L1 and L2 cache</title>
      <link>https://community.intel.com/t5/Mobile-and-Desktop-Processors/L1-and-L2-cache/m-p/209976#M1144</link>
      <description>&lt;P&gt;The database does not mention the SHA-1, however it does mention about Intel Advanced Encryption Standard Instructions (Intel AES-NI), please check page 82 at:&lt;/P&gt;&lt;P&gt;&lt;A href="http://www.intel.com/content/www/us/en/processors/xeon/xeon-e5-1600-2600-vol-1-datasheet.html"&gt;http://www.intel.com/content/www/us/en/processors/xeon/xeon-e5-1600-2600-vol-1-datasheet.html&lt;/A&gt; &lt;A href="http://www.intel.com/content/www/us/en/processors/xeon/xeon-e5-1600-2600-vol-1-datasheet.html"&gt;http://www.intel.com/content/www/us/en/processors/xeon/xeon-e5-1600-2600-vol-1-datasheet.html&lt;/A&gt;&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;If it is not the same thing, let me know so I will escalate this to the engineering department to confirm if it does support SHA-1 or not.&lt;/P&gt;</description>
      <pubDate>Thu, 29 Mar 2012 16:07:13 GMT</pubDate>
      <guid>https://community.intel.com/t5/Mobile-and-Desktop-Processors/L1-and-L2-cache/m-p/209976#M1144</guid>
      <dc:creator>Adolfo_S_Intel2</dc:creator>
      <dc:date>2012-03-29T16:07:13Z</dc:date>
    </item>
    <item>
      <title>Re: L1 and L2 cache</title>
      <link>https://community.intel.com/t5/Mobile-and-Desktop-Processors/L1-and-L2-cache/m-p/209977#M1145</link>
      <description>&lt;P&gt;Well it is actually not the same. AES is for encryption, whereas SHA-1 is for hashing.&lt;/P&gt;&lt;P&gt;Can you escalate whether the CPU's support SHA-1 for hashing?&lt;/P&gt;&lt;P&gt;Thanks, &lt;/P&gt;</description>
      <pubDate>Thu, 29 Mar 2012 16:16:08 GMT</pubDate>
      <guid>https://community.intel.com/t5/Mobile-and-Desktop-Processors/L1-and-L2-cache/m-p/209977#M1145</guid>
      <dc:creator>idata</dc:creator>
      <dc:date>2012-03-29T16:16:08Z</dc:date>
    </item>
    <item>
      <title>Re: L1 and L2 cache</title>
      <link>https://community.intel.com/t5/Mobile-and-Desktop-Processors/L1-and-L2-cache/m-p/209978#M1146</link>
      <description>&lt;P&gt;All current Intel processors support SHA-1 software implementations.  Intel has done extensive work on optimizing SHA-1 software algorithms for our instruction set.  There is a very good article at &lt;A href="http://software.intel.com/en-us/articles/improving-the-performance-of-the-secure-hash-algorithm-1/"&gt;http://software.intel.com/en-us/articles/improving-the-performance-of-the-secure-hash-algorithm-1/&lt;/A&gt; &lt;A href="http://software.intel.com/en-us/articles/improving-the-performance-of-the-secure-hash-algorithm-1/"&gt;http://software.intel.com/en-us/articles/improving-the-performance-of-the-secure-hash-algorithm-1/&lt;/A&gt; that you should read.&lt;/P&gt;</description>
      <pubDate>Tue, 03 Apr 2012 14:35:19 GMT</pubDate>
      <guid>https://community.intel.com/t5/Mobile-and-Desktop-Processors/L1-and-L2-cache/m-p/209978#M1146</guid>
      <dc:creator>Adolfo_S_Intel2</dc:creator>
      <dc:date>2012-04-03T14:35:19Z</dc:date>
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