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    <title>topic Re: DRAM RAPL Issue in Mobile and Desktop Processors</title>
    <link>https://community.intel.com/t5/Mobile-and-Desktop-Processors/DRAM-RAPL-Issue/m-p/507212#M25291</link>
    <description>&lt;P&gt;Hello kakarrot,&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;The BIOS sets DDR RAPL mode though BIOS-to-Pcode Mailbox command.  In this case you may Set DRAM only, the power consumption of the main memory.&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;In  regards to DRAM RAPL modes you have two options: DRAM RAPL MODE0=DRAM power from pure activity based estimation and  DRAM RAPL MODE1= DRAM power from scaling activity-based estimation to match DDR VR total power (based on VR12 IOUT register)&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;Regards, &lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;Caesar B.&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;</description>
    <pubDate>Fri, 18 Sep 2015 07:07:35 GMT</pubDate>
    <dc:creator>Cesar_B_Intel</dc:creator>
    <dc:date>2015-09-18T07:07:35Z</dc:date>
    <item>
      <title>DRAM RAPL Issue</title>
      <link>https://community.intel.com/t5/Mobile-and-Desktop-Processors/DRAM-RAPL-Issue/m-p/507210#M25289</link>
      <description>&lt;P&gt;Hi,&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;I am using a Xeon E5 1650 processor for my work and I have been trying to set the power limits for the DRAM through RAPL MSR's. There are no issues when I try to read the DRAM power consumption but&lt;/P&gt;&lt;P&gt;when I write the power limits to to MSR_DRAM_POWER_LIMIT (0x618), there is no change in the DRAM power consumption. &lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;I tried to check the BIOS settings and I am attaching couple of images that I found. Apparently, there is an option DRAM RAPL MODE and it's value can be choses as ) Off 2) Mode 0 and 3) Mode 1.&lt;/P&gt;&lt;P&gt;By default, the value was Mode 1. Can anybody tell me what exactly is the difference b/w these two modes. Also, what changes do I have to do to make the DRAM power limiting work?&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Thanks&lt;/P&gt;</description>
      <pubDate>Mon, 14 Sep 2015 15:46:33 GMT</pubDate>
      <guid>https://community.intel.com/t5/Mobile-and-Desktop-Processors/DRAM-RAPL-Issue/m-p/507210#M25289</guid>
      <dc:creator>vvaib</dc:creator>
      <dc:date>2015-09-14T15:46:33Z</dc:date>
    </item>
    <item>
      <title>Re: DRAM RAPL Issue</title>
      <link>https://community.intel.com/t5/Mobile-and-Desktop-Processors/DRAM-RAPL-Issue/m-p/507211#M25290</link>
      <description>&lt;P&gt;Hello kakarrot,&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;You can get better support at:&lt;/P&gt;&lt;P&gt;&lt;A href="http://Software.intel.com"&gt;Software.intel.com&lt;/A&gt;&lt;/P&gt;&lt;P&gt;&lt;/P&gt;</description>
      <pubDate>Wed, 16 Sep 2015 22:48:56 GMT</pubDate>
      <guid>https://community.intel.com/t5/Mobile-and-Desktop-Processors/DRAM-RAPL-Issue/m-p/507211#M25290</guid>
      <dc:creator>IUman</dc:creator>
      <dc:date>2015-09-16T22:48:56Z</dc:date>
    </item>
    <item>
      <title>Re: DRAM RAPL Issue</title>
      <link>https://community.intel.com/t5/Mobile-and-Desktop-Processors/DRAM-RAPL-Issue/m-p/507212#M25291</link>
      <description>&lt;P&gt;Hello kakarrot,&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;The BIOS sets DDR RAPL mode though BIOS-to-Pcode Mailbox command.  In this case you may Set DRAM only, the power consumption of the main memory.&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;In  regards to DRAM RAPL modes you have two options: DRAM RAPL MODE0=DRAM power from pure activity based estimation and  DRAM RAPL MODE1= DRAM power from scaling activity-based estimation to match DDR VR total power (based on VR12 IOUT register)&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;Regards, &lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;Caesar B.&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;</description>
      <pubDate>Fri, 18 Sep 2015 07:07:35 GMT</pubDate>
      <guid>https://community.intel.com/t5/Mobile-and-Desktop-Processors/DRAM-RAPL-Issue/m-p/507212#M25291</guid>
      <dc:creator>Cesar_B_Intel</dc:creator>
      <dc:date>2015-09-18T07:07:35Z</dc:date>
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