<?xml version="1.0" encoding="UTF-8"?>
<rss xmlns:content="http://purl.org/rss/1.0/modules/content/" xmlns:dc="http://purl.org/dc/elements/1.1/" xmlns:rdf="http://www.w3.org/1999/02/22-rdf-syntax-ns#" xmlns:taxo="http://purl.org/rss/1.0/modules/taxonomy/" version="2.0">
  <channel>
    <title>topic Re: DDR SPICE -Purley in Mobile and Desktop Processors</title>
    <link>https://community.intel.com/t5/Mobile-and-Desktop-Processors/DDR-SPICE-Purley/m-p/556083#M29053</link>
    <description>&lt;P&gt;Hello &lt;B&gt; viny&lt;/B&gt; &lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;Thank you for your response. &lt;P&gt;&amp;nbsp;&lt;/P&gt; &lt;P&gt;&amp;nbsp;&lt;/P&gt;Allow me to share with you that on this mean of support we provide assistance for Intel® NUCs, Intel® compute sticks,  Intel® Processors, Intel® graphics, on the case of your specific inquiry we provide assistance in the following sites of support:&lt;P&gt;&amp;nbsp;&lt;/P&gt; &lt;P&gt;&amp;nbsp;&lt;/P&gt;Intel® recourse and design center: &lt;P&gt;&amp;nbsp;&lt;/P&gt; &lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;A href="https://www.intel.la/content/www/xl/es/design/resource-design-center.html"&gt;https://www.intel.la/content/www/xl/es/design/resource-design-center.html&lt;/A&gt; &lt;A href="https://www.intel.la/content/www/xl/es/design/resource-design-center.html"&gt;https://www.intel.la/content/www/xl/es/design/resource-design-center.html&lt;/A&gt; &lt;P&gt;&amp;nbsp;&lt;/P&gt; &lt;P&gt;&amp;nbsp;&lt;/P&gt;Intel® Embedded Community:&lt;P&gt;&amp;nbsp;&lt;/P&gt; &lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;A href="https://www.intel.com/content/www/us/en/forms/design/registration-basic.html"&gt;https://www.intel.com/content/www/us/en/forms/design/registration-basic.html&lt;/A&gt; &lt;A href="https://www.intel.com/content/www/us/en/forms/design/registration-basic.html"&gt;https://www.intel.com/content/www/us/en/forms/design/registration-basic.html&lt;/A&gt; &lt;P&gt;&amp;nbsp;&lt;/P&gt; &lt;P&gt;&amp;nbsp;&lt;/P&gt;You can also refer to your authorized distributor for help to request a Field Applications Engineers (FAE).&lt;P&gt;&amp;nbsp;&lt;/P&gt; &lt;P&gt;&amp;nbsp;&lt;/P&gt;Please review your private inbox. &lt;P&gt;&amp;nbsp;&lt;/P&gt; &lt;P&gt;&amp;nbsp;&lt;/P&gt;Regards,&lt;P&gt;&amp;nbsp;&lt;/P&gt;Leonardo C.&lt;P&gt;&amp;nbsp;&lt;/P&gt;</description>
    <pubDate>Fri, 13 Apr 2018 22:28:10 GMT</pubDate>
    <dc:creator>idata</dc:creator>
    <dc:date>2018-04-13T22:28:10Z</dc:date>
    <item>
      <title>DDR SPICE -Purley</title>
      <link>https://community.intel.com/t5/Mobile-and-Desktop-Processors/DDR-SPICE-Purley/m-p/556080#M29050</link>
      <description>&lt;P&gt;Related to the DDR Model SPICE Files released for Skylake Purley Server, 553961_SKX_DDR4_SI_MUG_Models__Rev1_1, &lt;B&gt;The following clarification is required&lt;/B&gt;&lt;/P&gt;&lt;P&gt;1. What is the relevance of the buffer Models Under the INC&amp;gt;BUFFER  Folder.  &lt;/P&gt;&lt;P&gt;&amp;gt; The Details are Not Mentioned in the user Doc # 553961&lt;/P&gt;&lt;P&gt;2. Off the Available Buffer Models ( image attached ) Which one to Be considered for the DDR4 Analysis. &lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt; Refer the SPICE Models As attached.  &lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;&lt;/P&gt;</description>
      <pubDate>Thu, 12 Apr 2018 05:52:43 GMT</pubDate>
      <guid>https://community.intel.com/t5/Mobile-and-Desktop-Processors/DDR-SPICE-Purley/m-p/556080#M29050</guid>
      <dc:creator>vtham</dc:creator>
      <dc:date>2018-04-12T05:52:43Z</dc:date>
    </item>
    <item>
      <title>Re: DDR SPICE -Purley</title>
      <link>https://community.intel.com/t5/Mobile-and-Desktop-Processors/DDR-SPICE-Purley/m-p/556081#M29051</link>
      <description>&lt;P&gt;Hello &lt;B&gt; viny&lt;/B&gt; &lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt; &lt;P&gt;&amp;nbsp;&lt;/P&gt;Thank you for joining the community. &lt;P&gt;&amp;nbsp;&lt;/P&gt; &lt;P&gt;&amp;nbsp;&lt;/P&gt;Could you provide us with more information about your system (CPU model, motherboard model, Ram model)? &lt;P&gt;&amp;nbsp;&lt;/P&gt; &lt;P&gt;&amp;nbsp;&lt;/P&gt; In regards to the document # 553961 could you provide us with a link to investigate the documentation? &lt;P&gt;&amp;nbsp;&lt;/P&gt; &lt;P&gt;&amp;nbsp;&lt;/P&gt;When tiring to access the attached file I have an error to access it, cloud you provide a download file for it, o a link to open access it? &lt;P&gt;&amp;nbsp;&lt;/P&gt; &lt;P&gt;&amp;nbsp;&lt;/P&gt;Regards,         &lt;P&gt;&amp;nbsp;&lt;/P&gt;Leonardo C.&lt;P&gt;&amp;nbsp;&lt;/P&gt;</description>
      <pubDate>Thu, 12 Apr 2018 19:35:40 GMT</pubDate>
      <guid>https://community.intel.com/t5/Mobile-and-Desktop-Processors/DDR-SPICE-Purley/m-p/556081#M29051</guid>
      <dc:creator>idata</dc:creator>
      <dc:date>2018-04-12T19:35:40Z</dc:date>
    </item>
    <item>
      <title>Re: DDR SPICE -Purley</title>
      <link>https://community.intel.com/t5/Mobile-and-Desktop-Processors/DDR-SPICE-Purley/m-p/556082#M29052</link>
      <description>&lt;P&gt;Hi Leonardo,&lt;/P&gt;&lt;P&gt;1.CPU model -Skylake; Intel® Xeon® processor E5-2600 v5&lt;/P&gt;&lt;P&gt;2.Motherboard model -&lt;/P&gt;&lt;P&gt;Stripline routing, Target Impedance: 40 Ohm&lt;/P&gt;&lt;P&gt;(mid-loss FR-4)&lt;/P&gt;&lt;P&gt;3.RAM model -DDR4 2666MT/S LRDIMM&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Buffer folder attached, the description for buffer files are not available in documentation. Pls help with the description of each.&lt;/P&gt;</description>
      <pubDate>Fri, 13 Apr 2018 05:36:49 GMT</pubDate>
      <guid>https://community.intel.com/t5/Mobile-and-Desktop-Processors/DDR-SPICE-Purley/m-p/556082#M29052</guid>
      <dc:creator>vtham</dc:creator>
      <dc:date>2018-04-13T05:36:49Z</dc:date>
    </item>
    <item>
      <title>Re: DDR SPICE -Purley</title>
      <link>https://community.intel.com/t5/Mobile-and-Desktop-Processors/DDR-SPICE-Purley/m-p/556083#M29053</link>
      <description>&lt;P&gt;Hello &lt;B&gt; viny&lt;/B&gt; &lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;Thank you for your response. &lt;P&gt;&amp;nbsp;&lt;/P&gt; &lt;P&gt;&amp;nbsp;&lt;/P&gt;Allow me to share with you that on this mean of support we provide assistance for Intel® NUCs, Intel® compute sticks,  Intel® Processors, Intel® graphics, on the case of your specific inquiry we provide assistance in the following sites of support:&lt;P&gt;&amp;nbsp;&lt;/P&gt; &lt;P&gt;&amp;nbsp;&lt;/P&gt;Intel® recourse and design center: &lt;P&gt;&amp;nbsp;&lt;/P&gt; &lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;A href="https://www.intel.la/content/www/xl/es/design/resource-design-center.html"&gt;https://www.intel.la/content/www/xl/es/design/resource-design-center.html&lt;/A&gt; &lt;A href="https://www.intel.la/content/www/xl/es/design/resource-design-center.html"&gt;https://www.intel.la/content/www/xl/es/design/resource-design-center.html&lt;/A&gt; &lt;P&gt;&amp;nbsp;&lt;/P&gt; &lt;P&gt;&amp;nbsp;&lt;/P&gt;Intel® Embedded Community:&lt;P&gt;&amp;nbsp;&lt;/P&gt; &lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;A href="https://www.intel.com/content/www/us/en/forms/design/registration-basic.html"&gt;https://www.intel.com/content/www/us/en/forms/design/registration-basic.html&lt;/A&gt; &lt;A href="https://www.intel.com/content/www/us/en/forms/design/registration-basic.html"&gt;https://www.intel.com/content/www/us/en/forms/design/registration-basic.html&lt;/A&gt; &lt;P&gt;&amp;nbsp;&lt;/P&gt; &lt;P&gt;&amp;nbsp;&lt;/P&gt;You can also refer to your authorized distributor for help to request a Field Applications Engineers (FAE).&lt;P&gt;&amp;nbsp;&lt;/P&gt; &lt;P&gt;&amp;nbsp;&lt;/P&gt;Please review your private inbox. &lt;P&gt;&amp;nbsp;&lt;/P&gt; &lt;P&gt;&amp;nbsp;&lt;/P&gt;Regards,&lt;P&gt;&amp;nbsp;&lt;/P&gt;Leonardo C.&lt;P&gt;&amp;nbsp;&lt;/P&gt;</description>
      <pubDate>Fri, 13 Apr 2018 22:28:10 GMT</pubDate>
      <guid>https://community.intel.com/t5/Mobile-and-Desktop-Processors/DDR-SPICE-Purley/m-p/556083#M29053</guid>
      <dc:creator>idata</dc:creator>
      <dc:date>2018-04-13T22:28:10Z</dc:date>
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  </channel>
</rss>

