<?xml version="1.0" encoding="UTF-8"?>
<rss xmlns:content="http://purl.org/rss/1.0/modules/content/" xmlns:dc="http://purl.org/dc/elements/1.1/" xmlns:rdf="http://www.w3.org/1999/02/22-rdf-syntax-ns#" xmlns:taxo="http://purl.org/rss/1.0/modules/taxonomy/" version="2.0">
  <channel>
    <title>topic Re: Why did I get an 1 on a reserved bit of IA32_MTRRCAP register? in Mobile and Desktop Processors</title>
    <link>https://community.intel.com/t5/Mobile-and-Desktop-Processors/Why-did-I-get-an-1-on-a-reserved-bit-of-IA32-MTRRCAP-register/m-p/556358#M29064</link>
    <description>&lt;P&gt;Hello &lt;B&gt; gcrow&lt;/B&gt;,&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;Thank you for the information.&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;I will do some research on this and will update this thread once I have further information.&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;Regards,&lt;P&gt;&amp;nbsp;&lt;/P&gt;Juan Carlos</description>
    <pubDate>Mon, 13 Mar 2017 21:57:07 GMT</pubDate>
    <dc:creator>idata</dc:creator>
    <dc:date>2017-03-13T21:57:07Z</dc:date>
    <item>
      <title>Why did I get an 1 on a reserved bit of IA32_MTRRCAP register?</title>
      <link>https://community.intel.com/t5/Mobile-and-Desktop-Processors/Why-did-I-get-an-1-on-a-reserved-bit-of-IA32-MTRRCAP-register/m-p/556355#M29061</link>
      <description>&lt;P&gt;I'm trying to do some memory management on xen-4.5.0, and get confused with something about MTRR(Memory-type-range-register). While I was trying to get the value of IA32_MTRRCAP register, I got value 1d0a.&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;However, in the Intel manual released in December 2016, bits 12-63 of IA32_MTRRCAP register are all marked reserved, while I got an 1 on bit 12. Why?&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Meanwhile, when I was trying to read memory information from MTRRs, I could not find most of memory addresses in them.&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;I've tried these on several machines with Intel Skylake processors, and their situations are the same. But on machines with Intel Haswell processors, the value of IA32_MTRRCAP has nothing strange, I can also read all memory information from MTRRs. &lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Did the programming way of MTRRs change in Skylake? I can only guess in this way.&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Thanks.&lt;/P&gt;</description>
      <pubDate>Thu, 09 Mar 2017 14:05:16 GMT</pubDate>
      <guid>https://community.intel.com/t5/Mobile-and-Desktop-Processors/Why-did-I-get-an-1-on-a-reserved-bit-of-IA32-MTRRCAP-register/m-p/556355#M29061</guid>
      <dc:creator>XWang41</dc:creator>
      <dc:date>2017-03-09T14:05:16Z</dc:date>
    </item>
    <item>
      <title>Re: Why did I get an 1 on a reserved bit of IA32_MTRRCAP register?</title>
      <link>https://community.intel.com/t5/Mobile-and-Desktop-Processors/Why-did-I-get-an-1-on-a-reserved-bit-of-IA32-MTRRCAP-register/m-p/556356#M29062</link>
      <description>&lt;P&gt;Hello &lt;B&gt; gcrow&lt;/B&gt;,&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;Thank you for contacting Intel Communities.&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;Can you please provide the following information to better assist you?&lt;UL&gt;&lt;LI&gt;The model number for the tested Haswell &amp;amp; Skylake processors.&lt;/LI&gt;&lt;LI&gt;URL that leads to the document in question: "the Intel manual released in December 2016, bits 12-63 of IA32_MTRRCAP"&lt;/LI&gt;&lt;LI&gt;Steps to replicate the issue.&lt;/LI&gt;&lt;/UL&gt;Hope to hear from you soon.&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;Regards,&lt;P&gt;&amp;nbsp;&lt;/P&gt;Juan Carlos</description>
      <pubDate>Thu, 09 Mar 2017 19:44:03 GMT</pubDate>
      <guid>https://community.intel.com/t5/Mobile-and-Desktop-Processors/Why-did-I-get-an-1-on-a-reserved-bit-of-IA32-MTRRCAP-register/m-p/556356#M29062</guid>
      <dc:creator>idata</dc:creator>
      <dc:date>2017-03-09T19:44:03Z</dc:date>
    </item>
    <item>
      <title>Re: Why did I get an 1 on a reserved bit of IA32_MTRRCAP register?</title>
      <link>https://community.intel.com/t5/Mobile-and-Desktop-Processors/Why-did-I-get-an-1-on-a-reserved-bit-of-IA32-MTRRCAP-register/m-p/556357#M29063</link>
      <description>&lt;P&gt;The model number for Haswell is Intel(R) Core(TM) &lt;B&gt;i7-4770&lt;/B&gt; CPU @ 3.40GHz, for Skylake is Intel(R) Xeon(R) CPU &lt;B&gt;E3-1230&lt;/B&gt; v5 @ 3.40GHz.&lt;/P&gt;&lt;P&gt;The URL of the document is  &lt;A href="https://software.intel.com/sites/default/files/managed/39/c5/325462-sdm-vol-1-2abcd-3abcd.pdf"&gt;https://software.intel.com/sites/default/files/managed/39/c5/325462-sdm-vol-1-2abcd-3abcd.pdf&lt;/A&gt; , Figure 11.5, page 3092. In this figure, bits 12-63 are reserved.&lt;/P&gt;&lt;P&gt;The code for getting value of IA32_MTRRCAP and get memory info from MTRRs:&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;    rdmsrl(MSR_MTRRdefType, msr_deftype);&lt;/P&gt;&lt;P&gt;    sprintk("MTRRdefType=%lx\n", msr_deftype);&lt;/P&gt;&lt;P&gt;    rdmsrl(MSR_MTRRcap, msr_cap);&lt;/P&gt;&lt;P&gt;    sprintk("MTRRcap=%lx\n", msr_cap);&lt;/P&gt;&lt;P&gt;    vcnt = (int)(msr_cap &amp;amp; MTRR_VCNT_MASK);&lt;/P&gt;&lt;P&gt;    for (idx = 0; idx &amp;lt; vcnt; idx += 1) {&lt;/P&gt;&lt;P&gt;        rdmsrl(MSR_IA32_MTRR_PHYSBASE(idx), base);&lt;/P&gt;&lt;P&gt;        rdmsrl(MSR_IA32_MTRR_PHYSMASK(idx), mask);&lt;/P&gt;&lt;P&gt;        if (!(mask &amp;amp; MTRR_VRRP_MASK_MASK)) continue;&lt;/P&gt;&lt;P&gt;        start_mfn = base &amp;gt;&amp;gt; 12;&lt;/P&gt;&lt;P&gt;        //num_mfn: amount of pages&lt;/P&gt;&lt;P&gt;        num_mfn = (~(mask &amp;gt;&amp;gt; 12) &amp;amp; ((1UL &amp;lt;&amp;lt; (phys_addr_size - 12)) - 1)) + 1;&lt;/P&gt;&lt;P&gt;        mem_type = base &amp;amp; 0xff;&lt;/P&gt;&lt;P&gt;        sprintk("===MTTR base=%lx mask=%lx start=%lx num_mfn=%d type=%d\n",&lt;/P&gt;&lt;P&gt;                base, mask, start_mfn, (int)num_mfn, mem_type);&lt;/P&gt;&lt;P&gt;    }&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;&lt;B&gt;And the output on Haswell:&lt;/B&gt;&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;     (XEN) [0] vmx.c:806 MTRRdefType=c00&lt;/P&gt;&lt;P&gt;    &lt;B&gt; (XEN) [0] vmx.c:811 MTRRcap=d0a&lt;/B&gt;&lt;/P&gt;&lt;P&gt;     (XEN) [0] vmx.c:820 ept table root va=ffff83081e82e000&lt;/P&gt;&lt;P&gt;   &lt;B&gt;  (XEN) [0] vmx.c:855 ===MTTR base=6 mask=7800000800 start=0 num_mfn=8388608 type=6&lt;/B&gt;&lt;/P&gt;&lt;P&gt;&lt;B&gt;     (XEN) [0] vmx.c:855 ===MTTR base=800000006 mask=7fc0000800 start=800000 num_mfn=262144 type=6&lt;/B&gt;&lt;/P&gt;&lt;P&gt;     (XEN) [0] vmx.c:855 ===MTTR base=c0000000 mask=7fc0000800 start=c0000 num_mfn=262144 type=0&lt;/P&gt;&lt;P&gt;     (XEN) [0] vmx.c:855 ===MTTR base=bc000000 mask=7ffc000800 start=bc000 num_mfn=16384 type=0&lt;/P&gt;&lt;P&gt;     (XEN) [0] vmx.c:855 ===MTTR base=bb800000 mask=7fff800800 start=bb800 num_mfn=2048 type=0&lt;/P&gt;&lt;P&gt;     (XEN) [0] vmx.c:855 ===MTTR base=83f800000 mask=7fff800800 start=83f800 num_mfn=2048 type=0&lt;/P&gt;&lt;P&gt;     (XEN) [0] vmx.c:855 ===MTTR base=83f600000 mask=7fffe00800 start=83f600 num_mfn=512 type=0&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;&lt;B&gt;Output on Skylake:&lt;/B&gt;&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;     (XEN) [0] vmx.c:839 MTRRdefType=c06&lt;/P&gt;&lt;P&gt;     &lt;B&gt;(XEN) [0] vmx.c:844 MTRRcap=1d0a // got 1 on bit 12&lt;/B&gt;&lt;/P&gt;&lt;P&gt;     (XEN) [0] vmx.c:855 ept table root va=ffff8304588ef000&lt;/P&gt;&lt;P&gt;     (XEN) [0] vmx.c:892 ===MTTR base=c0000000 mask=7fc0000800 start=c0000 num_mfn=262144 type=0&lt;/P&gt;&lt;P&gt;     (XEN) [0] vmx.c:892 ===MTTR base=a0000000 mask=7fe0000800 start=a0000 num_mfn=131072 type=0&lt;/P&gt;&lt;P&gt;     (XEN) [0] vmx.c:892 ===MTTR base=90000000 mask=7ff0000800 start=90000 num_mfn=65536 type=0&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Where I cannot find most of memory on Skylake, and all found memory is UC type.&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Thank you very much!&lt;/P&gt;</description>
      <pubDate>Fri, 10 Mar 2017 04:21:14 GMT</pubDate>
      <guid>https://community.intel.com/t5/Mobile-and-Desktop-Processors/Why-did-I-get-an-1-on-a-reserved-bit-of-IA32-MTRRCAP-register/m-p/556357#M29063</guid>
      <dc:creator>XWang41</dc:creator>
      <dc:date>2017-03-10T04:21:14Z</dc:date>
    </item>
    <item>
      <title>Re: Why did I get an 1 on a reserved bit of IA32_MTRRCAP register?</title>
      <link>https://community.intel.com/t5/Mobile-and-Desktop-Processors/Why-did-I-get-an-1-on-a-reserved-bit-of-IA32-MTRRCAP-register/m-p/556358#M29064</link>
      <description>&lt;P&gt;Hello &lt;B&gt; gcrow&lt;/B&gt;,&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;Thank you for the information.&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;I will do some research on this and will update this thread once I have further information.&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;Regards,&lt;P&gt;&amp;nbsp;&lt;/P&gt;Juan Carlos</description>
      <pubDate>Mon, 13 Mar 2017 21:57:07 GMT</pubDate>
      <guid>https://community.intel.com/t5/Mobile-and-Desktop-Processors/Why-did-I-get-an-1-on-a-reserved-bit-of-IA32-MTRRCAP-register/m-p/556358#M29064</guid>
      <dc:creator>idata</dc:creator>
      <dc:date>2017-03-13T21:57:07Z</dc:date>
    </item>
    <item>
      <title>Re: Why did I get an 1 on a reserved bit of IA32_MTRRCAP register?</title>
      <link>https://community.intel.com/t5/Mobile-and-Desktop-Processors/Why-did-I-get-an-1-on-a-reserved-bit-of-IA32-MTRRCAP-register/m-p/556359#M29065</link>
      <description>&lt;P&gt;Thank you very much.&lt;/P&gt;&lt;P&gt;Hope to hear from you soon.&lt;/P&gt;</description>
      <pubDate>Tue, 14 Mar 2017 01:18:16 GMT</pubDate>
      <guid>https://community.intel.com/t5/Mobile-and-Desktop-Processors/Why-did-I-get-an-1-on-a-reserved-bit-of-IA32-MTRRCAP-register/m-p/556359#M29065</guid>
      <dc:creator>XWang41</dc:creator>
      <dc:date>2017-03-14T01:18:16Z</dc:date>
    </item>
    <item>
      <title>Re: Why did I get an 1 on a reserved bit of IA32_MTRRCAP register?</title>
      <link>https://community.intel.com/t5/Mobile-and-Desktop-Processors/Why-did-I-get-an-1-on-a-reserved-bit-of-IA32-MTRRCAP-register/m-p/556360#M29066</link>
      <description>&lt;P&gt;Hello &lt;B&gt; gcrow&lt;/B&gt;,&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;Thank you for waiting&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;After some research, the best option is to post your question in the &lt;A href="https://software.intel.com/en-us/forum#"&gt;https://software.intel.com/en-us/forum#&lt;/A&gt; Intel® Developer Zone Forums.&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;Regards,&lt;P&gt;&amp;nbsp;&lt;/P&gt;Juan Carlos</description>
      <pubDate>Thu, 16 Mar 2017 16:19:30 GMT</pubDate>
      <guid>https://community.intel.com/t5/Mobile-and-Desktop-Processors/Why-did-I-get-an-1-on-a-reserved-bit-of-IA32-MTRRCAP-register/m-p/556360#M29066</guid>
      <dc:creator>idata</dc:creator>
      <dc:date>2017-03-16T16:19:30Z</dc:date>
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  </channel>
</rss>

