Machine check exception decoding information

idata — Thu, 08 Mar 2012 10:45:28 GMT

I'm Anna Lanzaro, a PhD student of the University of Naples doing some

research about the Machine Check Architecture (MCA). I was wondering

whether you have some information about the correspondence between the

banks of the MCA and the hardware units they are related to. I was

reading the Intel documentation about how to decode machine check

errors ( Intel® 64 and IA-32 Architectures Software Developer's Manual

Volume 3 System Programming Guide

http://www.intel.com/content/www/us/en/architecture-and-technology/64-ia-32-architectures-software-developer-system-programming-manual-325384.html http://www.intel.com/content/www/us/en/architecture-and-technology/64-ia-32-architectures-software-developer-system-programming-manual-325384.html).

For example I saw that MC8_STATUS may be related to the memory

controller, but I don't have this information for the processor i7

Sandy Bridge family 06_2AH and I didn't find any documentation at all.

Please, could you tell me how all the MCi_STATUS (i=0,1...8) registers

map each hardware units on my processor and how I can decode them?

Anna

Re: Machine check exception decoding information

Adolfo_S_Intel2 — Thu, 08 Mar 2012 21:06:38 GMT

I see that you are looking for very specific technical information.

In this particular case, the type of information that you are looking for can only be provided by a Field Application Engineer (FAE).

In order to talk to a Field Application Engineer (FAE), please call any of our local Authorized Intel® Distributors, and ask them to put you in contact with a Field Application Engineer (FAE).

You can find a list of Authorized Intel® Distributors at:

http://www.intel.com/cd/channel/reseller/asmo-na/eng/227304.htm http://www.intel.com/cd/channel/reseller/asmo-na/eng/227304.htm

If you are outside the United States, please access the following link and select a location, to find the closest authorized distributor:

http://premierlocator.intel.com/Default.aspx http://premierlocator.intel.com/Default.aspx

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Machine check exception decoding information

Re: Machine check exception decoding information