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    <title>topic Coreboot 4.11/4.13 on denverton ns family c3508 processor board in Mobile and Desktop Processors</title>
    <link>https://community.intel.com/t5/Mobile-and-Desktop-Processors/Coreboot-4-11-4-13-on-denverton-ns-family-c3508-processor-board/m-p/1256351#M49662</link>
    <description>&lt;P&gt;Hi ,&lt;/P&gt;
&lt;P&gt;We have a intel processor C3508 denverton ns series eval board. We are trying to develop coreboot image on it . It has 16 MB SPI boot flash&amp;nbsp; .&lt;/P&gt;
&lt;P&gt;Following are the things tried :&lt;/P&gt;
&lt;P&gt;1. Downloaded 4.13 coreboot checkout . Built toolchain&amp;nbsp;&lt;/P&gt;
&lt;P&gt;2. Tried both changing native coreboot cache initialisation and FSP_T Initialsation .&lt;/P&gt;
&lt;P&gt;3. Tried adding both micro_code generation from the tree and microcode_blob.h from the denverton package .&amp;nbsp;&lt;/P&gt;
&lt;P&gt;4. Added denverton fsp and including header files FSP*.h . (This step is not optional because , denverton series fsp's and header files are already checkedin in the coreboot code).&lt;/P&gt;
&lt;P&gt;5. It generated coreboot.rom with the size 16MB . 67. Tried flashing coreboot.rom using dediprog tool . Programming is successful but no prints are coming .&lt;/P&gt;
&lt;P&gt;6. Ram module is sodimm&amp;nbsp;&lt;/P&gt;
&lt;P&gt;In this some document it has mentioned to use spsFTIC tool to generate complete image .&lt;/P&gt;
&lt;P&gt;We are not able to get any prints on this . Any help on this is highly appreciated .&lt;/P&gt;
&lt;P&gt;&amp;nbsp;&lt;/P&gt;
&lt;P&gt;Thanks,&lt;/P&gt;
&lt;P&gt;GaneshC&lt;/P&gt;
&lt;P&gt;&amp;nbsp;&lt;/P&gt;</description>
    <pubDate>Tue, 16 Feb 2021 10:37:51 GMT</pubDate>
    <dc:creator>venkatesabalaji</dc:creator>
    <dc:date>2021-02-16T10:37:51Z</dc:date>
    <item>
      <title>Coreboot 4.11/4.13 on denverton ns family c3508 processor board</title>
      <link>https://community.intel.com/t5/Mobile-and-Desktop-Processors/Coreboot-4-11-4-13-on-denverton-ns-family-c3508-processor-board/m-p/1256351#M49662</link>
      <description>&lt;P&gt;Hi ,&lt;/P&gt;
&lt;P&gt;We have a intel processor C3508 denverton ns series eval board. We are trying to develop coreboot image on it . It has 16 MB SPI boot flash&amp;nbsp; .&lt;/P&gt;
&lt;P&gt;Following are the things tried :&lt;/P&gt;
&lt;P&gt;1. Downloaded 4.13 coreboot checkout . Built toolchain&amp;nbsp;&lt;/P&gt;
&lt;P&gt;2. Tried both changing native coreboot cache initialisation and FSP_T Initialsation .&lt;/P&gt;
&lt;P&gt;3. Tried adding both micro_code generation from the tree and microcode_blob.h from the denverton package .&amp;nbsp;&lt;/P&gt;
&lt;P&gt;4. Added denverton fsp and including header files FSP*.h . (This step is not optional because , denverton series fsp's and header files are already checkedin in the coreboot code).&lt;/P&gt;
&lt;P&gt;5. It generated coreboot.rom with the size 16MB . 67. Tried flashing coreboot.rom using dediprog tool . Programming is successful but no prints are coming .&lt;/P&gt;
&lt;P&gt;6. Ram module is sodimm&amp;nbsp;&lt;/P&gt;
&lt;P&gt;In this some document it has mentioned to use spsFTIC tool to generate complete image .&lt;/P&gt;
&lt;P&gt;We are not able to get any prints on this . Any help on this is highly appreciated .&lt;/P&gt;
&lt;P&gt;&amp;nbsp;&lt;/P&gt;
&lt;P&gt;Thanks,&lt;/P&gt;
&lt;P&gt;GaneshC&lt;/P&gt;
&lt;P&gt;&amp;nbsp;&lt;/P&gt;</description>
      <pubDate>Tue, 16 Feb 2021 10:37:51 GMT</pubDate>
      <guid>https://community.intel.com/t5/Mobile-and-Desktop-Processors/Coreboot-4-11-4-13-on-denverton-ns-family-c3508-processor-board/m-p/1256351#M49662</guid>
      <dc:creator>venkatesabalaji</dc:creator>
      <dc:date>2021-02-16T10:37:51Z</dc:date>
    </item>
    <item>
      <title>Re:Coreboot 4.11/4.13 on denverton ns family c3508 processor board</title>
      <link>https://community.intel.com/t5/Mobile-and-Desktop-Processors/Coreboot-4-11-4-13-on-denverton-ns-family-c3508-processor-board/m-p/1256620#M49683</link>
      <description>&lt;P&gt;Hello venkatesabalaji,&lt;/P&gt;&lt;P&gt;&lt;BR /&gt;&lt;/P&gt;&lt;P&gt;Thank you for posting your question on this Intel® Community.&lt;/P&gt;&lt;P&gt;&lt;BR /&gt;&lt;/P&gt;&lt;P&gt;Intel Atom® Processor C3508 is an embedded processor. For this reason, our recommendation is that you post your question on the Embedded Community:&lt;/P&gt;&lt;P&gt;&lt;BR /&gt;&lt;/P&gt;&lt;UL&gt;&lt;LI&gt;Embedded Server &amp;gt; Intel® Xeon and Atom server Hardware, Firmware, Software and Tools&lt;/LI&gt;&lt;LI&gt;&lt;A href="https://community.intel.com/t5/Embedded-Server/bd-p/emb-server-hardware-software-firmware" target="_blank"&gt;https://community.intel.com/t5/Embedded-Server/bd-p/emb-server-hardware-software-firmware&lt;/A&gt;&lt;/LI&gt;&lt;/UL&gt;&lt;P&gt;&lt;BR /&gt;&lt;/P&gt;&lt;P&gt;In addition, if your company is directly supported by Field Application Engineers (FAEs), you can get in contact with them and use Intel® Premier Support (IPS) to submit issues.&lt;/P&gt;&lt;P&gt;&lt;BR /&gt;&lt;/P&gt;&lt;P&gt;To get an IPS account setup and activated, please contact your FAE.&lt;/P&gt;&lt;P&gt;&lt;BR /&gt;&lt;/P&gt;&lt;P&gt;We will proceed to close this thread. We hope you find this information helpful.&lt;/P&gt;&lt;P&gt;&lt;BR /&gt;&lt;/P&gt;&lt;P&gt;Regards,&lt;/P&gt;&lt;P&gt;&lt;BR /&gt;&lt;/P&gt;&lt;P&gt;Wanner G.&lt;/P&gt;&lt;P&gt;Intel Customer Support Technician&lt;/P&gt;&lt;BR /&gt;</description>
      <pubDate>Wed, 17 Feb 2021 01:42:55 GMT</pubDate>
      <guid>https://community.intel.com/t5/Mobile-and-Desktop-Processors/Coreboot-4-11-4-13-on-denverton-ns-family-c3508-processor-board/m-p/1256620#M49683</guid>
      <dc:creator>IntelSupport</dc:creator>
      <dc:date>2021-02-17T01:42:55Z</dc:date>
    </item>
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