Intel Quartus Qsys

Subhabrata — Tue, 13 Jun 2023 15:47:21 GMT

I have created NIOS II based system in Qsys (Quartus Prime Lite 18.1). completed all connection, memory mapping and IRQ.

But to generate HDL (Generate -> generate HDL), I am getting only .v and .sv file as output, though I have selected VHDL as HDL source.

Re:Intel Quartus Qsys

Jocelyn_Intel — Wed, 14 Jun 2023 15:28:02 GMT

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Jocelyn M.

Intel Customer Support Technician.