<?xml version="1.0" encoding="UTF-8"?>
<rss xmlns:content="http://purl.org/rss/1.0/modules/content/" xmlns:dc="http://purl.org/dc/elements/1.1/" xmlns:rdf="http://www.w3.org/1999/02/22-rdf-syntax-ns#" xmlns:taxo="http://purl.org/rss/1.0/modules/taxonomy/" version="2.0">
  <channel>
    <title>topic Re:Inter-Processor Interrupts / Destination Mode: Logical in Mobile and Desktop Processors</title>
    <link>https://community.intel.com/t5/Mobile-and-Desktop-Processors/Inter-Processor-Interrupts-Destination-Mode-Logical/m-p/1560157#M68273</link>
    <description>&lt;P&gt;Hi osmanyagci,&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;Thank you for posting on Intel Community.&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;Please note since you confirmed the issue is resolved, we will be closing this request.&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;Please don't hesitate to ask any further questions in the future. &lt;/P&gt;&lt;P&gt;&lt;BR /&gt;&lt;/P&gt;&lt;P&gt;Feel free to start a new conversation, as this thread will no longer be monitored.&lt;/P&gt;&lt;P&gt;&lt;BR /&gt;&lt;/P&gt;&lt;P&gt;Regards,&lt;/P&gt;&lt;P&gt;Megha K&lt;/P&gt;&lt;BR /&gt;</description>
    <pubDate>Fri, 05 Jan 2024 06:16:08 GMT</pubDate>
    <dc:creator>Meghak</dc:creator>
    <dc:date>2024-01-05T06:16:08Z</dc:date>
    <item>
      <title>Inter-Processor Interrupts / Destination Mode: Logical</title>
      <link>https://community.intel.com/t5/Mobile-and-Desktop-Processors/Inter-Processor-Interrupts-Destination-Mode-Logical/m-p/1559434#M68218</link>
      <description>&lt;P&gt;Hi,&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;I am trying to send IPI' s in &lt;STRONG&gt;logical&lt;/STRONG&gt; destination mode but it always sends the interrupt to the "&lt;STRONG&gt;running core&lt;/STRONG&gt;". For example, my program is running on core 0 and I want to send IPI' s to core 1 and core 2 but it sends the interrupt to core 0 always.&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;The configurations I made;&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;I have configured &lt;STRONG&gt;DFR&lt;/STRONG&gt; register (offset 0xE0) "&lt;STRONG&gt;Model&lt;/STRONG&gt;" field to &lt;STRONG&gt;flat mode&lt;/STRONG&gt;.&lt;/P&gt;&lt;P&gt;I have configured &lt;STRONG&gt;LDR&lt;/STRONG&gt; register (offset 0xD0) "&lt;STRONG&gt;Logical APIC ID&lt;/STRONG&gt;" field to 0xFF.&lt;/P&gt;&lt;P&gt;I have configured &lt;STRONG&gt;ICR&lt;/STRONG&gt; (bits 32-63) to (core id &amp;lt;&amp;lt; 24); ( for the above example core id = 0x6)&lt;/P&gt;&lt;P&gt;I have configured &lt;STRONG&gt;ICR&lt;/STRONG&gt; (bits 0-31) to (0x483c);&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;After this configurations, I poll Delivery Status bit so that operation finishes.&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;I have tried it on &lt;STRONG&gt;tr-b12&lt;/STRONG&gt;&amp;nbsp;board and qemu-x86 but I get the same result described above.&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;I have no problem in physical destination mode.&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;What more should I do so that it works properly?&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;Thanks in advance.&lt;/P&gt;</description>
      <pubDate>Wed, 03 Jan 2024 10:51:28 GMT</pubDate>
      <guid>https://community.intel.com/t5/Mobile-and-Desktop-Processors/Inter-Processor-Interrupts-Destination-Mode-Logical/m-p/1559434#M68218</guid>
      <dc:creator>osmanyagci</dc:creator>
      <dc:date>2024-01-03T10:51:28Z</dc:date>
    </item>
    <item>
      <title>Re: Inter-Processor Interrupts / Destination Mode: Logical</title>
      <link>https://community.intel.com/t5/Mobile-and-Desktop-Processors/Inter-Processor-Interrupts-Destination-Mode-Logical/m-p/1559763#M68241</link>
      <description>&lt;P&gt;I have solved the problem myself.&amp;nbsp;&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;The problem is that I was not configuring LDR register correctly. It should be updated per core!&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;Example;&lt;/P&gt;&lt;P&gt;&amp;nbsp; &amp;nbsp; For core 0: Logical APIC ID field in LDR should be 0x1&lt;/P&gt;&lt;P&gt;&amp;nbsp; &amp;nbsp; For core 1: Logical APIC ID field in LDR should be 0x2&lt;/P&gt;&lt;P&gt;&amp;nbsp; &amp;nbsp; For core 2: Logical APIC ID field in LDR should be 0x4&lt;/P&gt;&lt;P&gt;&amp;nbsp; &amp;nbsp; For core 3: Logical APIC ID field in LDR should be 0x8&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;Then IPI can be sent to each core by setting MDA field properly. In my case, to send interrupt to core 2 and core 3, MDA field should be 0x6.&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;</description>
      <pubDate>Thu, 04 Jan 2024 07:28:30 GMT</pubDate>
      <guid>https://community.intel.com/t5/Mobile-and-Desktop-Processors/Inter-Processor-Interrupts-Destination-Mode-Logical/m-p/1559763#M68241</guid>
      <dc:creator>osmanyagci</dc:creator>
      <dc:date>2024-01-04T07:28:30Z</dc:date>
    </item>
    <item>
      <title>Re:Inter-Processor Interrupts / Destination Mode: Logical</title>
      <link>https://community.intel.com/t5/Mobile-and-Desktop-Processors/Inter-Processor-Interrupts-Destination-Mode-Logical/m-p/1560157#M68273</link>
      <description>&lt;P&gt;Hi osmanyagci,&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;Thank you for posting on Intel Community.&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;Please note since you confirmed the issue is resolved, we will be closing this request.&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;Please don't hesitate to ask any further questions in the future. &lt;/P&gt;&lt;P&gt;&lt;BR /&gt;&lt;/P&gt;&lt;P&gt;Feel free to start a new conversation, as this thread will no longer be monitored.&lt;/P&gt;&lt;P&gt;&lt;BR /&gt;&lt;/P&gt;&lt;P&gt;Regards,&lt;/P&gt;&lt;P&gt;Megha K&lt;/P&gt;&lt;BR /&gt;</description>
      <pubDate>Fri, 05 Jan 2024 06:16:08 GMT</pubDate>
      <guid>https://community.intel.com/t5/Mobile-and-Desktop-Processors/Inter-Processor-Interrupts-Destination-Mode-Logical/m-p/1560157#M68273</guid>
      <dc:creator>Meghak</dc:creator>
      <dc:date>2024-01-05T06:16:08Z</dc:date>
    </item>
  </channel>
</rss>

