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    <title>topic Re: Frequencies of the L1, L2, L3 caches. in Mobile and Desktop Processors</title>
    <link>https://community.intel.com/t5/Mobile-and-Desktop-Processors/Frequencies-of-the-L1-L2-L3-caches/m-p/334924#M9905</link>
    <description>&lt;P&gt;Addition: maybe influences for speed caches that value: CAS-latency as decelerating, analogy RAM.&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;For example: frequency L1 = L2. But latency L1 &amp;lt; latency L2. Conclusion: L1 fastest L2.&lt;/P&gt;</description>
    <pubDate>Wed, 11 Mar 2015 19:04:22 GMT</pubDate>
    <dc:creator>СБело2</dc:creator>
    <dc:date>2015-03-11T19:04:22Z</dc:date>
    <item>
      <title>Frequencies of the L1, L2, L3 caches.</title>
      <link>https://community.intel.com/t5/Mobile-and-Desktop-Processors/Frequencies-of-the-L1-L2-L3-caches/m-p/334922#M9903</link>
      <description>&lt;P&gt;Need answer from employee of  company Intel.&lt;/P&gt;&lt;P&gt;10-20 years ago caches of processor has that features:&lt;/P&gt;&lt;P&gt;- cache L1 integrated in processor, have smallest size and speedest frequency;&lt;/P&gt;&lt;P&gt;- cache L2 integrated in motherboard, have frequency = frequency of data bus. Biggest than L1, but many slowly.&lt;/P&gt;&lt;P&gt;What features have caches of processors now (i3 and newer)? I have 3 answers, need faithfull:&lt;/P&gt;&lt;P&gt;1. L1 &amp;lt; L2. L2 &amp;lt; L3. L1 speedest L2, L2 speedest L3.&lt;/P&gt;&lt;P&gt;2. L1 &amp;lt; L2. Frequency L1 = frequency L2 = frequency of processor's core. Frequency L3 &amp;lt; L1.&lt;/P&gt;&lt;P&gt;3. L1 &amp;lt; L2. Frequency L1 = frequency L2 = frequency of processor's core. Frequency L3 = L1.&lt;/P&gt;</description>
      <pubDate>Tue, 10 Mar 2015 17:40:34 GMT</pubDate>
      <guid>https://community.intel.com/t5/Mobile-and-Desktop-Processors/Frequencies-of-the-L1-L2-L3-caches/m-p/334922#M9903</guid>
      <dc:creator>СБело2</dc:creator>
      <dc:date>2015-03-10T17:40:34Z</dc:date>
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    <item>
      <title>Re: Frequencies of the L1, L2, L3 caches.</title>
      <link>https://community.intel.com/t5/Mobile-and-Desktop-Processors/Frequencies-of-the-L1-L2-L3-caches/m-p/334923#M9904</link>
      <description>&lt;P&gt;I am currently researching on this issue. As soon as I can, I will send you a message with my findings. Thank you for your patience and understanding. &lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Allan.&lt;/P&gt;</description>
      <pubDate>Wed, 11 Mar 2015 18:49:11 GMT</pubDate>
      <guid>https://community.intel.com/t5/Mobile-and-Desktop-Processors/Frequencies-of-the-L1-L2-L3-caches/m-p/334923#M9904</guid>
      <dc:creator>Allan_J_Intel1</dc:creator>
      <dc:date>2015-03-11T18:49:11Z</dc:date>
    </item>
    <item>
      <title>Re: Frequencies of the L1, L2, L3 caches.</title>
      <link>https://community.intel.com/t5/Mobile-and-Desktop-Processors/Frequencies-of-the-L1-L2-L3-caches/m-p/334924#M9905</link>
      <description>&lt;P&gt;Addition: maybe influences for speed caches that value: CAS-latency as decelerating, analogy RAM.&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;For example: frequency L1 = L2. But latency L1 &amp;lt; latency L2. Conclusion: L1 fastest L2.&lt;/P&gt;</description>
      <pubDate>Wed, 11 Mar 2015 19:04:22 GMT</pubDate>
      <guid>https://community.intel.com/t5/Mobile-and-Desktop-Processors/Frequencies-of-the-L1-L2-L3-caches/m-p/334924#M9905</guid>
      <dc:creator>СБело2</dc:creator>
      <dc:date>2015-03-11T19:04:22Z</dc:date>
    </item>
    <item>
      <title>Re: Frequencies of the L1, L2, L3 caches.</title>
      <link>https://community.intel.com/t5/Mobile-and-Desktop-Processors/Frequencies-of-the-L1-L2-L3-caches/m-p/334925#M9906</link>
      <description>&lt;P&gt;I got that:&lt;/P&gt;&lt;P&gt;&lt;I&gt;- Intel. Intel® 64 and IA-32 Architectures Optimization Reference Manual&lt;/I&gt;: p,2-18, chapter 2.2.5.1, table 2-11.&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Frequency L1 = L2 = L3. But latency L1 &amp;lt; latency L2 &amp;lt; latency L3.&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;L1 fastest (latency 4), L2 slowly (latency 12), L3 lowest (latency 26-31).&lt;/P&gt;</description>
      <pubDate>Thu, 12 Mar 2015 19:47:33 GMT</pubDate>
      <guid>https://community.intel.com/t5/Mobile-and-Desktop-Processors/Frequencies-of-the-L1-L2-L3-caches/m-p/334925#M9906</guid>
      <dc:creator>СБело2</dc:creator>
      <dc:date>2015-03-12T19:47:33Z</dc:date>
    </item>
    <item>
      <title>Re: Frequencies of the L1, L2, L3 caches.</title>
      <link>https://community.intel.com/t5/Mobile-and-Desktop-Processors/Frequencies-of-the-L1-L2-L3-caches/m-p/334926#M9907</link>
      <description>&lt;P&gt;Hi &lt;B&gt; Sergey_85&lt;/B&gt;,&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Intel(R) Core(TM) i7 / Intel(R) Core(TM) i5 / Cache Hierarchy:&lt;/P&gt;&lt;P&gt;The first level cache consists of a 32K L1 data cache and a 32K L1 instruction cache with one cache allocated per core. The second level cache is a high speed 256K cache for data and instructions with one cache allocated per core. The third level cache is a 8Mb inclusive cache logically shared across cores for Intel(R) Core(TM) i7 5xxx processors and a 6Mb inclusive cache shared across cores for the Intel(R) Core(TM) i5 5xxx processors.&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;I hope this helps,&lt;/P&gt;</description>
      <pubDate>Thu, 28 May 2015 16:51:03 GMT</pubDate>
      <guid>https://community.intel.com/t5/Mobile-and-Desktop-Processors/Frequencies-of-the-L1-L2-L3-caches/m-p/334926#M9907</guid>
      <dc:creator>Ronny_G_Intel</dc:creator>
      <dc:date>2015-05-28T16:51:03Z</dc:date>
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    <item>
      <title>Re: Frequencies of the L1, L2, L3 caches.</title>
      <link>https://community.intel.com/t5/Mobile-and-Desktop-Processors/Frequencies-of-the-L1-L2-L3-caches/m-p/334927#M9908</link>
      <description>&lt;P&gt;In addition to that: Intel(R) Core(TM) i3  Cache Hierarchy:&lt;/P&gt;&lt;P&gt;The first level cache consists of a 32K L1 data cache and a 32K L1 instruction cache with one cache allocated per core. The second level cache is a high speed 256K cache for data and instructions with one cache allocated per core. The third level cache is a 3Mb (Core i3 41xx/T) and 4Mb (Core i3 43xx/T) inclusive cache logically shared across cores.&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;I missed that part on my original answer.&lt;/P&gt;&lt;P&gt;Regards,&lt;/P&gt;</description>
      <pubDate>Thu, 28 May 2015 17:05:16 GMT</pubDate>
      <guid>https://community.intel.com/t5/Mobile-and-Desktop-Processors/Frequencies-of-the-L1-L2-L3-caches/m-p/334927#M9908</guid>
      <dc:creator>Ronny_G_Intel</dc:creator>
      <dc:date>2015-05-28T17:05:16Z</dc:date>
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