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    <title>topic _mm512_mask_extloadunpackhi in Software Archive</title>
    <link>https://community.intel.com/t5/Software-Archive/Manually-control-MIC-SIMD-operations/m-p/916815#M12791</link>
    <description>&lt;P&gt;&lt;SPAN style="color: rgb(96, 96, 96);"&gt;_mm512_mask_extloadunpackhi_ps is not available on KNC. If you can't align your data use&amp;nbsp;&lt;/SPAN&gt;&lt;SPAN style="color: rgb(0, 0, 0); font-family: 'Oxygen Mono', sans-serif; font-size: 16px; line-height: normal;"&gt;_mm512_i32extgather_ps for loading your data into a register. But I think it would be better to align your data, otherwise the processor has to load several cache lines for loading data into a register. Alignment is always possible if you use padding techniques for the memory layout.&lt;/SPAN&gt;&lt;/P&gt;</description>
    <pubDate>Mon, 17 Feb 2014 11:27:43 GMT</pubDate>
    <dc:creator>Patrick_S_</dc:creator>
    <dc:date>2014-02-17T11:27:43Z</dc:date>
    <item>
      <title>Manually control MIC SIMD operations.</title>
      <link>https://community.intel.com/t5/Software-Archive/Manually-control-MIC-SIMD-operations/m-p/916814#M12790</link>
      <description>&lt;P&gt;&lt;SPAN style="font-size: 1em; line-height: 1.5;"&gt;I wants to&amp;nbsp;&lt;/SPAN&gt;manually manage my code's the SIMD operations on MIC, and write the intrinsics&amp;nbsp;below&lt;/P&gt;

&lt;PRE class="brush:cpp;"&gt;
_k_mask = _mm512_int2mask(0x7ff); // 0000 0111 1111 1111
_tempux2_512 = _mm512_mask_loadunpacklo_ps(_tempux2_512,_k_mask, &amp;amp;u_x[POSITION_INDEX_X(k,j,i-5)]);
_tempux2_512 = _mm512_mask_loadunpackhi_ps(_tempux2_512,_k_mask, &amp;amp;u_x[POSITION_INDEX_X(k,j,i-5)]+16);&lt;/PRE&gt;

&lt;P&gt;And the compiler icpc gives these error message.&lt;/P&gt;

&lt;PRE class="brush:plain;"&gt;
test.cpp:574: undefined reference to `_mm512_mask_extloadunpacklo_ps'
test.cpp:575: undefined reference to `_mm512_mask_extloadunpackhi_ps'&lt;/PRE&gt;

&lt;P&gt;It will be okay to compile if I use&amp;nbsp;_mm512_mask_load_ps, but my memory cannot be 64-byte-aligned so using&amp;nbsp;_mm512_mask_load_ps will cause an runtime error.&lt;/P&gt;

&lt;P&gt;Then I tried to write inline asm block manually like this&lt;/P&gt;

&lt;PRE class="brush:plain;"&gt;
MOV rax,0x7ff
KMOV k1,rax
VMOVAPS zmm1 {k1}, [data_512_1]
VMOVAPS zmm2 {k1}, [data_512_2]
VMULPS	zmm3 {k1}, zmm2 zmm1
VMOVAPS [data_512_3] {k1}, zmm3&lt;/PRE&gt;

&lt;P&gt;And the compiler icpc shows error again&lt;/P&gt;

&lt;PRE class="brush:plain;"&gt;
test_simd.cpp(30): (col. 10) error: Unknown opcode KMOV in asm instruction .
test_simd.cpp(33): (col. 10) error: Syntax error ZMM1 in asm instruction vmulps.&lt;/PRE&gt;

&lt;P&gt;I'm a beginner of assembly language,It would be really grateful if anyone can tell me why icpc didn't find the reference and how to fix it,or could recommend some materials to me. (I've read the Intel® Xeon Phi™ Coprocessor Instruction Set Architecture Reference Manual but still do not know how to write it.)&lt;/P&gt;

&lt;P&gt;Thanks a lot.&lt;/P&gt;</description>
      <pubDate>Mon, 17 Feb 2014 04:17:44 GMT</pubDate>
      <guid>https://community.intel.com/t5/Software-Archive/Manually-control-MIC-SIMD-operations/m-p/916814#M12790</guid>
      <dc:creator>Coxious_H_</dc:creator>
      <dc:date>2014-02-17T04:17:44Z</dc:date>
    </item>
    <item>
      <title>_mm512_mask_extloadunpackhi</title>
      <link>https://community.intel.com/t5/Software-Archive/Manually-control-MIC-SIMD-operations/m-p/916815#M12791</link>
      <description>&lt;P&gt;&lt;SPAN style="color: rgb(96, 96, 96);"&gt;_mm512_mask_extloadunpackhi_ps is not available on KNC. If you can't align your data use&amp;nbsp;&lt;/SPAN&gt;&lt;SPAN style="color: rgb(0, 0, 0); font-family: 'Oxygen Mono', sans-serif; font-size: 16px; line-height: normal;"&gt;_mm512_i32extgather_ps for loading your data into a register. But I think it would be better to align your data, otherwise the processor has to load several cache lines for loading data into a register. Alignment is always possible if you use padding techniques for the memory layout.&lt;/SPAN&gt;&lt;/P&gt;</description>
      <pubDate>Mon, 17 Feb 2014 11:27:43 GMT</pubDate>
      <guid>https://community.intel.com/t5/Software-Archive/Manually-control-MIC-SIMD-operations/m-p/916815#M12791</guid>
      <dc:creator>Patrick_S_</dc:creator>
      <dc:date>2014-02-17T11:27:43Z</dc:date>
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