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    <title>topic Cache Locking on Pentium Processor Family? in Software Archive</title>
    <link>https://community.intel.com/t5/Software-Archive/Cache-Locking-on-Pentium-Processor-Family/m-p/921401#M13400</link>
    <description>Hi everybody,&lt;BR /&gt;&lt;BR /&gt;I'm Arintel. I'm new to this forum.&lt;BR /&gt;&lt;BR /&gt;I'm looking for a document on how to implement Cache Locking (including data &amp;amp; instruction cache locking and code sample) on Pentium Processor Family.&lt;BR /&gt;&lt;BR /&gt;It should be similar to the documents I found below, which are for CPU 80321 and XScale micro-architecture:&lt;BR /&gt;&lt;BR /&gt;&lt;A href="http://www.intel.com/design/iio/papers/27387202.pdf" target="_blank"&gt;http://www.intel.com/design/iio/papers/27387202.pdf&lt;/A&gt;&lt;BR /&gt;(section 4.5 and appendix C)&lt;BR /&gt;&lt;BR /&gt;&lt;A href="http://www.intel.com/design/intelxscale/27347302.pdf" target="_blank"&gt;http://www.intel.com/design/intelxscale/27347302.pdf&lt;/A&gt;&lt;BR /&gt;(section 6.4 and its examples)&lt;BR /&gt;&lt;BR /&gt;Can someone tell me how to get it or where to buy it?&lt;BR /&gt;Can I possibly find it in Early Access to Intel Platforms Program ?&lt;BR /&gt;&lt;BR /&gt;Thanks sincerely,&lt;BR /&gt;ARINTEL</description>
    <pubDate>Mon, 27 Dec 2004 23:15:34 GMT</pubDate>
    <dc:creator>arintel1</dc:creator>
    <dc:date>2004-12-27T23:15:34Z</dc:date>
    <item>
      <title>Cache Locking on Pentium Processor Family?</title>
      <link>https://community.intel.com/t5/Software-Archive/Cache-Locking-on-Pentium-Processor-Family/m-p/921401#M13400</link>
      <description>Hi everybody,&lt;BR /&gt;&lt;BR /&gt;I'm Arintel. I'm new to this forum.&lt;BR /&gt;&lt;BR /&gt;I'm looking for a document on how to implement Cache Locking (including data &amp;amp; instruction cache locking and code sample) on Pentium Processor Family.&lt;BR /&gt;&lt;BR /&gt;It should be similar to the documents I found below, which are for CPU 80321 and XScale micro-architecture:&lt;BR /&gt;&lt;BR /&gt;&lt;A href="http://www.intel.com/design/iio/papers/27387202.pdf" target="_blank"&gt;http://www.intel.com/design/iio/papers/27387202.pdf&lt;/A&gt;&lt;BR /&gt;(section 4.5 and appendix C)&lt;BR /&gt;&lt;BR /&gt;&lt;A href="http://www.intel.com/design/intelxscale/27347302.pdf" target="_blank"&gt;http://www.intel.com/design/intelxscale/27347302.pdf&lt;/A&gt;&lt;BR /&gt;(section 6.4 and its examples)&lt;BR /&gt;&lt;BR /&gt;Can someone tell me how to get it or where to buy it?&lt;BR /&gt;Can I possibly find it in Early Access to Intel Platforms Program ?&lt;BR /&gt;&lt;BR /&gt;Thanks sincerely,&lt;BR /&gt;ARINTEL</description>
      <pubDate>Mon, 27 Dec 2004 23:15:34 GMT</pubDate>
      <guid>https://community.intel.com/t5/Software-Archive/Cache-Locking-on-Pentium-Processor-Family/m-p/921401#M13400</guid>
      <dc:creator>arintel1</dc:creator>
      <dc:date>2004-12-27T23:15:34Z</dc:date>
    </item>
    <item>
      <title>Re: Cache Locking on Pentium Processor Family?</title>
      <link>https://community.intel.com/t5/Software-Archive/Cache-Locking-on-Pentium-Processor-Family/m-p/921402#M13401</link>
      <description>&lt;DIV&gt;&lt;/DIV&gt;
&lt;DIV align="left"&gt;&lt;FONT size="2"&gt;Greetings from Intel Software Network Support. Here is the response our engineering team supplied:&lt;/FONT&gt;&lt;/DIV&gt;
&lt;DIV align="left"&gt;&lt;FONT size="2"&gt;&lt;/FONT&gt;&lt;/DIV&gt;
&lt;DIV align="left"&gt;&lt;SPAN style="FONT-SIZE: 10pt; COLOR: green; FONT-FAMILY: Arial"&gt;Unlike the Intel XScale series of processors, the Pentium 4 processor does not support locking of data in the cache. The Pentium 4 processor does have cache prefetch instructions to ensure that the required data is present in the cache when needed. If accessed regularly, data will also be present in the cache due to the cache eviction policy (LRU). The Pentium 4 processor also has an automatic prefetching mechanism which will ensure that data is present in the cache if multiple sequential accesses are made. We regret that the exact functionality that you requested is not present, but we hope that you will be able to implement a similar functionality with the available instructions. &lt;/SPAN&gt;&lt;/DIV&gt;
&lt;DIV align="left"&gt;&lt;SPAN style="FONT-SIZE: 10pt; COLOR: green; FONT-FAMILY: Arial"&gt;&lt;/SPAN&gt;&lt;/DIV&gt;
&lt;DIV align="left"&gt;&lt;SPAN style="FONT-SIZE: 10pt; COLOR: green; FONT-FAMILY: Arial"&gt;&lt;FONT color="#000000"&gt;Regards, &lt;/FONT&gt;&lt;/SPAN&gt;&lt;/DIV&gt;
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&lt;DIV align="left"&gt;&lt;SPAN style="FONT-SIZE: 10pt; COLOR: green; FONT-FAMILY: Arial"&gt;&lt;/SPAN&gt;&lt;/DIV&gt;&lt;P&gt;Message Edited by intel.software.network.support on &lt;SPAN class="date_text"&gt;12-07-2005&lt;/SPAN&gt; &lt;SPAN class="time_text"&gt;04:17 PM&lt;/SPAN&gt;&lt;/P&gt;</description>
      <pubDate>Sat, 22 Jan 2005 08:46:52 GMT</pubDate>
      <guid>https://community.intel.com/t5/Software-Archive/Cache-Locking-on-Pentium-Processor-Family/m-p/921402#M13401</guid>
      <dc:creator>Intel_Software_Netw1</dc:creator>
      <dc:date>2005-01-22T08:46:52Z</dc:date>
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