<?xml version="1.0" encoding="UTF-8"?>
<rss xmlns:content="http://purl.org/rss/1.0/modules/content/" xmlns:dc="http://purl.org/dc/elements/1.1/" xmlns:rdf="http://www.w3.org/1999/02/22-rdf-syntax-ns#" xmlns:taxo="http://purl.org/rss/1.0/modules/taxonomy/" version="2.0">
  <channel>
    <title>topic VT-d programming in Software Archive</title>
    <link>https://community.intel.com/t5/Software-Archive/VT-d-programming/m-p/934004#M15446</link>
    <description>&lt;P&gt;I am trying to expriment with DMA remapping using VT-d.&amp;nbsp; By reading the VT-d spec, I know how to setup the remapping tables.&amp;nbsp; However, I don't know how to locate the register that will receive the base address of the remapping table hierarchy.&lt;/P&gt;
&lt;P&gt;Reading the spec for my processor, I see there is a Root-Entry Table Address Register (&amp;nbsp;RTADDR_REG) at offset 20–27h.&amp;nbsp; But what is the base of this "block" ( the spec says this is PEG/DMI VT-d Remapping Engine Register Address Map).&lt;/P&gt;
&lt;P&gt;Can anyone help me find this in the documentation somehwhere?&lt;/P&gt;
&lt;P&gt;&amp;nbsp;Thanks!&lt;/P&gt;</description>
    <pubDate>Thu, 19 Sep 2013 16:06:41 GMT</pubDate>
    <dc:creator>Yogi_D_</dc:creator>
    <dc:date>2013-09-19T16:06:41Z</dc:date>
    <item>
      <title>VT-d programming</title>
      <link>https://community.intel.com/t5/Software-Archive/VT-d-programming/m-p/934004#M15446</link>
      <description>&lt;P&gt;I am trying to expriment with DMA remapping using VT-d.&amp;nbsp; By reading the VT-d spec, I know how to setup the remapping tables.&amp;nbsp; However, I don't know how to locate the register that will receive the base address of the remapping table hierarchy.&lt;/P&gt;
&lt;P&gt;Reading the spec for my processor, I see there is a Root-Entry Table Address Register (&amp;nbsp;RTADDR_REG) at offset 20–27h.&amp;nbsp; But what is the base of this "block" ( the spec says this is PEG/DMI VT-d Remapping Engine Register Address Map).&lt;/P&gt;
&lt;P&gt;Can anyone help me find this in the documentation somehwhere?&lt;/P&gt;
&lt;P&gt;&amp;nbsp;Thanks!&lt;/P&gt;</description>
      <pubDate>Thu, 19 Sep 2013 16:06:41 GMT</pubDate>
      <guid>https://community.intel.com/t5/Software-Archive/VT-d-programming/m-p/934004#M15446</guid>
      <dc:creator>Yogi_D_</dc:creator>
      <dc:date>2013-09-19T16:06:41Z</dc:date>
    </item>
    <item>
      <title>See "chapter 10.4.6 - Root</title>
      <link>https://community.intel.com/t5/Software-Archive/VT-d-programming/m-p/934005#M15447</link>
      <description>&lt;P&gt;See &lt;A href="http://www.intel.com/content/www/us/en/intelligent-systems/intel-technology/vt-directed-io-spec.html?wapkw=directed+i%2fo"&gt;"chapter 10.4.6 - Root Table Address Register from the Intel(R) Virtualization Technology for&amp;nbsp;Directed I/: Spec"&amp;nbsp;&lt;/A&gt;for more details.&amp;nbsp; Here is the URL: &lt;A href="http://www.intel.com/content/www/us/en/intelligent-systems/intel-technology/vt-directed-io-spec.html?wapkw=directed+i%2fo"&gt;http://www.intel.com/content/www/us/en/intelligent-systems/intel-technology/vt-directed-io-spec.html?wapkw=directed+i%2fo&lt;/A&gt;&lt;/P&gt;
&lt;P&gt;-Thai&lt;/P&gt;
&lt;P&gt;&amp;nbsp;&lt;/P&gt;</description>
      <pubDate>Thu, 03 Oct 2013 20:45:14 GMT</pubDate>
      <guid>https://community.intel.com/t5/Software-Archive/VT-d-programming/m-p/934005#M15447</guid>
      <dc:creator>Quoc-Thai_L_Intel</dc:creator>
      <dc:date>2013-10-03T20:45:14Z</dc:date>
    </item>
    <item>
      <title>A new blog was created to</title>
      <link>https://community.intel.com/t5/Software-Archive/VT-d-programming/m-p/934006#M15448</link>
      <description>&lt;P&gt;A new blog was created to provide resources for sw developers: &lt;A href="http://software.intel.com/en-us/blogs/2014/03/25/resources-for-software-developers-intel-virtualization-technology-intel-vt"&gt;Resources for Software Developers: Intel® Virtualization Technology (Intel® VT)&lt;/A&gt;&lt;/P&gt;

&lt;P&gt;-Thai&lt;/P&gt;</description>
      <pubDate>Fri, 28 Mar 2014 23:32:44 GMT</pubDate>
      <guid>https://community.intel.com/t5/Software-Archive/VT-d-programming/m-p/934006#M15448</guid>
      <dc:creator>Quoc-Thai_L_Intel</dc:creator>
      <dc:date>2014-03-28T23:32:44Z</dc:date>
    </item>
  </channel>
</rss>

