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    <title>topic User Controlled Power Management in Software Archive</title>
    <link>https://community.intel.com/t5/Software-Archive/User-Controlled-Power-Management/m-p/934797#M15612</link>
    <description>&lt;P&gt;Hi everyone,&lt;/P&gt;

&lt;P&gt;I need to perform fine-precision performance measurements on MIC and experience considerable variance due to DVFS.&lt;/P&gt;

&lt;P&gt;I was tracking the frequency and voltage using 'micinfo' tool with 1 second resolution. I did 2 experiment executions of exactly the same test and the results are attached. The&amp;nbsp; first experiment was run just after resetting the coprocessor, and the initial frequency was 1.04 GHz. During the 1st experiment execution the frequency dropped from 1.04GHz to 0.84GHz. With the drop of frequency the clocksource changed from 'tsc' to less precise 'micetc'. During the 2nd experiment execution the frequency was 0.84GHz during the whole experiment, but the voltage changed as it is depicted on the chart. So can anybody clarify the following questions:&lt;/P&gt;

&lt;DIV class="im"&gt;1. During changes of the voltage the frequency stays the same (except one discrete drop from 1.04GHz to 0.84GHz due to PROCHOT interrupt) according to the output of micinfo. But as far as I see in Datasheet (June, 2013) Figure 5-8 the frequency should drop together with voltage except Low Frequency Mode zone. So can I conclude from voltage change that coprocessor swithces to different P-states as voltage changes? And micinfo doesn't show exact value of the frequency, does it?&lt;BR /&gt;
	&amp;nbsp;&lt;/DIV&gt;

&lt;P&gt;2. Is there a way to force the coprocessor to operate in the lowest possible voltage and frequency state Pn or any other user defined&amp;nbsp; (say 960000uV)?&lt;/P&gt;

&lt;P&gt;3. As I can see in System Software Developer Guide (June, 2013) Figure 3-1 there is User Mode PM console app to contol Power Management. Does anybody know the details for that app?&lt;/P&gt;

&lt;P&gt;Thank you!&lt;/P&gt;

&lt;P&gt;Below is dmesg output, Power Management Configuration and micinfo output.&lt;/P&gt;

&lt;P&gt;dmesg output (during frequency drop from 1.04GHz to 0.84GHz):&lt;/P&gt;

&lt;P&gt;[&amp;nbsp; 458.685498] PROCHOT interrupt&lt;BR /&gt;
	[&amp;nbsp; 459.180135] Clocksource tsc unstable (delta = -122042579 ns)&lt;BR /&gt;
	[&amp;nbsp; 459.180719] Switching to clocksource micetc&lt;BR /&gt;
	[&amp;nbsp; 516.684694] RAS.get_freq: core not running at expected frequency&lt;/P&gt;

&lt;P&gt;....&lt;/P&gt;

&lt;P&gt;[&amp;nbsp; 862.973207] PROCHOT interrupt&lt;BR /&gt;
	[&amp;nbsp; 862.982334] Setting maxfreq to 800000&lt;BR /&gt;
	[&amp;nbsp; 862.982355] Failed to update cpufreq policy&lt;BR /&gt;
	[&amp;nbsp; 863.132325] Setting maxfreq to 0&lt;BR /&gt;
	[&amp;nbsp; 863.132340] Failed to update cpufreq policy&lt;/P&gt;

&lt;P&gt;&amp;nbsp;&lt;/P&gt;

&lt;P&gt;Power Management was configured that way:&lt;BR /&gt;
	/etc/sysconfig/mic/mic0.conf&lt;BR /&gt;
	...&lt;BR /&gt;
	PowerManagement "cpufreq_off;corec6_off;pc3_off;pc6_off"&lt;/P&gt;

&lt;P&gt;&lt;BR /&gt;
	Here is the configuration of MIC I have:&lt;BR /&gt;
	...&lt;BR /&gt;
	&amp;nbsp;&amp;nbsp;&amp;nbsp; Version&lt;BR /&gt;
	&amp;nbsp;&amp;nbsp;&amp;nbsp; &amp;nbsp;&amp;nbsp;&amp;nbsp; Flash Version &amp;nbsp;&amp;nbsp;&amp;nbsp; &amp;nbsp;&amp;nbsp;&amp;nbsp; &amp;nbsp;: 2.1.03.0386&lt;BR /&gt;
	&amp;nbsp;&amp;nbsp;&amp;nbsp; &amp;nbsp;&amp;nbsp;&amp;nbsp; SMC Firmware Version&amp;nbsp;&amp;nbsp;&amp;nbsp; &amp;nbsp;: 1.15.4830&lt;BR /&gt;
	&amp;nbsp;&amp;nbsp;&amp;nbsp; &amp;nbsp;&amp;nbsp;&amp;nbsp; SMC Boot Loader Version&amp;nbsp;&amp;nbsp;&amp;nbsp; &amp;nbsp;: 1.8.4326&lt;BR /&gt;
	&amp;nbsp;&amp;nbsp;&amp;nbsp; &amp;nbsp;&amp;nbsp;&amp;nbsp; uOS Version &amp;nbsp;&amp;nbsp;&amp;nbsp; &amp;nbsp;&amp;nbsp;&amp;nbsp; &amp;nbsp;: 2.6.38.8+mpss3.1&lt;BR /&gt;
	&amp;nbsp;&amp;nbsp;&amp;nbsp; &amp;nbsp;&amp;nbsp;&amp;nbsp; Device Serial Number &amp;nbsp;&amp;nbsp;&amp;nbsp; &amp;nbsp;: ADKC25101431&lt;BR /&gt;
	&lt;BR /&gt;
	&amp;nbsp;&amp;nbsp;&amp;nbsp; Board&lt;BR /&gt;
	&amp;nbsp;&amp;nbsp;&amp;nbsp; &amp;nbsp;&amp;nbsp;&amp;nbsp; Vendor ID &amp;nbsp;&amp;nbsp;&amp;nbsp; &amp;nbsp;&amp;nbsp;&amp;nbsp; &amp;nbsp;: 0x8086&lt;BR /&gt;
	&amp;nbsp;&amp;nbsp;&amp;nbsp; &amp;nbsp;&amp;nbsp;&amp;nbsp; Device ID &amp;nbsp;&amp;nbsp;&amp;nbsp; &amp;nbsp;&amp;nbsp;&amp;nbsp; &amp;nbsp;: 0x2250&lt;BR /&gt;
	&amp;nbsp;&amp;nbsp;&amp;nbsp; &amp;nbsp;&amp;nbsp;&amp;nbsp; Subsystem ID &amp;nbsp;&amp;nbsp;&amp;nbsp; &amp;nbsp;&amp;nbsp;&amp;nbsp; &amp;nbsp;: 0x2500&lt;BR /&gt;
	&amp;nbsp;&amp;nbsp;&amp;nbsp; &amp;nbsp;&amp;nbsp;&amp;nbsp; Coprocessor Stepping ID&amp;nbsp;&amp;nbsp;&amp;nbsp; &amp;nbsp;: 3&lt;BR /&gt;
	&amp;nbsp;&amp;nbsp;&amp;nbsp; &amp;nbsp;&amp;nbsp;&amp;nbsp; PCIe Width &amp;nbsp;&amp;nbsp;&amp;nbsp; &amp;nbsp;&amp;nbsp;&amp;nbsp; &amp;nbsp;: x16&lt;BR /&gt;
	&amp;nbsp;&amp;nbsp;&amp;nbsp; &amp;nbsp;&amp;nbsp;&amp;nbsp; PCIe Speed &amp;nbsp;&amp;nbsp;&amp;nbsp; &amp;nbsp;&amp;nbsp;&amp;nbsp; &amp;nbsp;: 5 GT/s&lt;BR /&gt;
	&amp;nbsp;&amp;nbsp;&amp;nbsp; &amp;nbsp;&amp;nbsp;&amp;nbsp; PCIe Max payload size&amp;nbsp;&amp;nbsp;&amp;nbsp; &amp;nbsp;: 256 bytes&lt;BR /&gt;
	&amp;nbsp;&amp;nbsp;&amp;nbsp; &amp;nbsp;&amp;nbsp;&amp;nbsp; PCIe Max read req size&amp;nbsp;&amp;nbsp;&amp;nbsp; &amp;nbsp;: 512 bytes&lt;BR /&gt;
	&amp;nbsp;&amp;nbsp;&amp;nbsp; &amp;nbsp;&amp;nbsp;&amp;nbsp; Coprocessor Model&amp;nbsp;&amp;nbsp;&amp;nbsp; &amp;nbsp;: 0x01&lt;BR /&gt;
	&amp;nbsp;&amp;nbsp;&amp;nbsp; &amp;nbsp;&amp;nbsp;&amp;nbsp; Coprocessor Model Ext&amp;nbsp;&amp;nbsp;&amp;nbsp; &amp;nbsp;: 0x00&lt;BR /&gt;
	&amp;nbsp;&amp;nbsp;&amp;nbsp; &amp;nbsp;&amp;nbsp;&amp;nbsp; Coprocessor Type&amp;nbsp;&amp;nbsp;&amp;nbsp; &amp;nbsp;: 0x00&lt;BR /&gt;
	&amp;nbsp;&amp;nbsp;&amp;nbsp; &amp;nbsp;&amp;nbsp;&amp;nbsp; Coprocessor Family&amp;nbsp;&amp;nbsp;&amp;nbsp; &amp;nbsp;: 0x0b&lt;BR /&gt;
	&amp;nbsp;&amp;nbsp;&amp;nbsp; &amp;nbsp;&amp;nbsp;&amp;nbsp; Coprocessor Family Ext&amp;nbsp;&amp;nbsp;&amp;nbsp; &amp;nbsp;: 0x00&lt;BR /&gt;
	&amp;nbsp;&amp;nbsp;&amp;nbsp; &amp;nbsp;&amp;nbsp;&amp;nbsp; Coprocessor Stepping &amp;nbsp;&amp;nbsp;&amp;nbsp; &amp;nbsp;: B1&lt;BR /&gt;
	&amp;nbsp;&amp;nbsp;&amp;nbsp; &amp;nbsp;&amp;nbsp;&amp;nbsp; Board SKU &amp;nbsp;&amp;nbsp;&amp;nbsp; &amp;nbsp;&amp;nbsp;&amp;nbsp; &amp;nbsp;: B1PRQ-5110P/5120D&lt;BR /&gt;
	&amp;nbsp;&amp;nbsp;&amp;nbsp; &amp;nbsp;&amp;nbsp;&amp;nbsp; ECC Mode &amp;nbsp;&amp;nbsp;&amp;nbsp; &amp;nbsp;&amp;nbsp;&amp;nbsp; &amp;nbsp;: Enabled&lt;BR /&gt;
	&amp;nbsp;&amp;nbsp;&amp;nbsp; &amp;nbsp;&amp;nbsp;&amp;nbsp; SMC HW Revision &amp;nbsp;&amp;nbsp;&amp;nbsp; &amp;nbsp;: Product 225W Passive CS&lt;/P&gt;</description>
    <pubDate>Tue, 10 Dec 2013 19:17:47 GMT</pubDate>
    <dc:creator>Andrey_R_</dc:creator>
    <dc:date>2013-12-10T19:17:47Z</dc:date>
    <item>
      <title>User Controlled Power Management</title>
      <link>https://community.intel.com/t5/Software-Archive/User-Controlled-Power-Management/m-p/934797#M15612</link>
      <description>&lt;P&gt;Hi everyone,&lt;/P&gt;

&lt;P&gt;I need to perform fine-precision performance measurements on MIC and experience considerable variance due to DVFS.&lt;/P&gt;

&lt;P&gt;I was tracking the frequency and voltage using 'micinfo' tool with 1 second resolution. I did 2 experiment executions of exactly the same test and the results are attached. The&amp;nbsp; first experiment was run just after resetting the coprocessor, and the initial frequency was 1.04 GHz. During the 1st experiment execution the frequency dropped from 1.04GHz to 0.84GHz. With the drop of frequency the clocksource changed from 'tsc' to less precise 'micetc'. During the 2nd experiment execution the frequency was 0.84GHz during the whole experiment, but the voltage changed as it is depicted on the chart. So can anybody clarify the following questions:&lt;/P&gt;

&lt;DIV class="im"&gt;1. During changes of the voltage the frequency stays the same (except one discrete drop from 1.04GHz to 0.84GHz due to PROCHOT interrupt) according to the output of micinfo. But as far as I see in Datasheet (June, 2013) Figure 5-8 the frequency should drop together with voltage except Low Frequency Mode zone. So can I conclude from voltage change that coprocessor swithces to different P-states as voltage changes? And micinfo doesn't show exact value of the frequency, does it?&lt;BR /&gt;
	&amp;nbsp;&lt;/DIV&gt;

&lt;P&gt;2. Is there a way to force the coprocessor to operate in the lowest possible voltage and frequency state Pn or any other user defined&amp;nbsp; (say 960000uV)?&lt;/P&gt;

&lt;P&gt;3. As I can see in System Software Developer Guide (June, 2013) Figure 3-1 there is User Mode PM console app to contol Power Management. Does anybody know the details for that app?&lt;/P&gt;

&lt;P&gt;Thank you!&lt;/P&gt;

&lt;P&gt;Below is dmesg output, Power Management Configuration and micinfo output.&lt;/P&gt;

&lt;P&gt;dmesg output (during frequency drop from 1.04GHz to 0.84GHz):&lt;/P&gt;

&lt;P&gt;[&amp;nbsp; 458.685498] PROCHOT interrupt&lt;BR /&gt;
	[&amp;nbsp; 459.180135] Clocksource tsc unstable (delta = -122042579 ns)&lt;BR /&gt;
	[&amp;nbsp; 459.180719] Switching to clocksource micetc&lt;BR /&gt;
	[&amp;nbsp; 516.684694] RAS.get_freq: core not running at expected frequency&lt;/P&gt;

&lt;P&gt;....&lt;/P&gt;

&lt;P&gt;[&amp;nbsp; 862.973207] PROCHOT interrupt&lt;BR /&gt;
	[&amp;nbsp; 862.982334] Setting maxfreq to 800000&lt;BR /&gt;
	[&amp;nbsp; 862.982355] Failed to update cpufreq policy&lt;BR /&gt;
	[&amp;nbsp; 863.132325] Setting maxfreq to 0&lt;BR /&gt;
	[&amp;nbsp; 863.132340] Failed to update cpufreq policy&lt;/P&gt;

&lt;P&gt;&amp;nbsp;&lt;/P&gt;

&lt;P&gt;Power Management was configured that way:&lt;BR /&gt;
	/etc/sysconfig/mic/mic0.conf&lt;BR /&gt;
	...&lt;BR /&gt;
	PowerManagement "cpufreq_off;corec6_off;pc3_off;pc6_off"&lt;/P&gt;

&lt;P&gt;&lt;BR /&gt;
	Here is the configuration of MIC I have:&lt;BR /&gt;
	...&lt;BR /&gt;
	&amp;nbsp;&amp;nbsp;&amp;nbsp; Version&lt;BR /&gt;
	&amp;nbsp;&amp;nbsp;&amp;nbsp; &amp;nbsp;&amp;nbsp;&amp;nbsp; Flash Version &amp;nbsp;&amp;nbsp;&amp;nbsp; &amp;nbsp;&amp;nbsp;&amp;nbsp; &amp;nbsp;: 2.1.03.0386&lt;BR /&gt;
	&amp;nbsp;&amp;nbsp;&amp;nbsp; &amp;nbsp;&amp;nbsp;&amp;nbsp; SMC Firmware Version&amp;nbsp;&amp;nbsp;&amp;nbsp; &amp;nbsp;: 1.15.4830&lt;BR /&gt;
	&amp;nbsp;&amp;nbsp;&amp;nbsp; &amp;nbsp;&amp;nbsp;&amp;nbsp; SMC Boot Loader Version&amp;nbsp;&amp;nbsp;&amp;nbsp; &amp;nbsp;: 1.8.4326&lt;BR /&gt;
	&amp;nbsp;&amp;nbsp;&amp;nbsp; &amp;nbsp;&amp;nbsp;&amp;nbsp; uOS Version &amp;nbsp;&amp;nbsp;&amp;nbsp; &amp;nbsp;&amp;nbsp;&amp;nbsp; &amp;nbsp;: 2.6.38.8+mpss3.1&lt;BR /&gt;
	&amp;nbsp;&amp;nbsp;&amp;nbsp; &amp;nbsp;&amp;nbsp;&amp;nbsp; Device Serial Number &amp;nbsp;&amp;nbsp;&amp;nbsp; &amp;nbsp;: ADKC25101431&lt;BR /&gt;
	&lt;BR /&gt;
	&amp;nbsp;&amp;nbsp;&amp;nbsp; Board&lt;BR /&gt;
	&amp;nbsp;&amp;nbsp;&amp;nbsp; &amp;nbsp;&amp;nbsp;&amp;nbsp; Vendor ID &amp;nbsp;&amp;nbsp;&amp;nbsp; &amp;nbsp;&amp;nbsp;&amp;nbsp; &amp;nbsp;: 0x8086&lt;BR /&gt;
	&amp;nbsp;&amp;nbsp;&amp;nbsp; &amp;nbsp;&amp;nbsp;&amp;nbsp; Device ID &amp;nbsp;&amp;nbsp;&amp;nbsp; &amp;nbsp;&amp;nbsp;&amp;nbsp; &amp;nbsp;: 0x2250&lt;BR /&gt;
	&amp;nbsp;&amp;nbsp;&amp;nbsp; &amp;nbsp;&amp;nbsp;&amp;nbsp; Subsystem ID &amp;nbsp;&amp;nbsp;&amp;nbsp; &amp;nbsp;&amp;nbsp;&amp;nbsp; &amp;nbsp;: 0x2500&lt;BR /&gt;
	&amp;nbsp;&amp;nbsp;&amp;nbsp; &amp;nbsp;&amp;nbsp;&amp;nbsp; Coprocessor Stepping ID&amp;nbsp;&amp;nbsp;&amp;nbsp; &amp;nbsp;: 3&lt;BR /&gt;
	&amp;nbsp;&amp;nbsp;&amp;nbsp; &amp;nbsp;&amp;nbsp;&amp;nbsp; PCIe Width &amp;nbsp;&amp;nbsp;&amp;nbsp; &amp;nbsp;&amp;nbsp;&amp;nbsp; &amp;nbsp;: x16&lt;BR /&gt;
	&amp;nbsp;&amp;nbsp;&amp;nbsp; &amp;nbsp;&amp;nbsp;&amp;nbsp; PCIe Speed &amp;nbsp;&amp;nbsp;&amp;nbsp; &amp;nbsp;&amp;nbsp;&amp;nbsp; &amp;nbsp;: 5 GT/s&lt;BR /&gt;
	&amp;nbsp;&amp;nbsp;&amp;nbsp; &amp;nbsp;&amp;nbsp;&amp;nbsp; PCIe Max payload size&amp;nbsp;&amp;nbsp;&amp;nbsp; &amp;nbsp;: 256 bytes&lt;BR /&gt;
	&amp;nbsp;&amp;nbsp;&amp;nbsp; &amp;nbsp;&amp;nbsp;&amp;nbsp; PCIe Max read req size&amp;nbsp;&amp;nbsp;&amp;nbsp; &amp;nbsp;: 512 bytes&lt;BR /&gt;
	&amp;nbsp;&amp;nbsp;&amp;nbsp; &amp;nbsp;&amp;nbsp;&amp;nbsp; Coprocessor Model&amp;nbsp;&amp;nbsp;&amp;nbsp; &amp;nbsp;: 0x01&lt;BR /&gt;
	&amp;nbsp;&amp;nbsp;&amp;nbsp; &amp;nbsp;&amp;nbsp;&amp;nbsp; Coprocessor Model Ext&amp;nbsp;&amp;nbsp;&amp;nbsp; &amp;nbsp;: 0x00&lt;BR /&gt;
	&amp;nbsp;&amp;nbsp;&amp;nbsp; &amp;nbsp;&amp;nbsp;&amp;nbsp; Coprocessor Type&amp;nbsp;&amp;nbsp;&amp;nbsp; &amp;nbsp;: 0x00&lt;BR /&gt;
	&amp;nbsp;&amp;nbsp;&amp;nbsp; &amp;nbsp;&amp;nbsp;&amp;nbsp; Coprocessor Family&amp;nbsp;&amp;nbsp;&amp;nbsp; &amp;nbsp;: 0x0b&lt;BR /&gt;
	&amp;nbsp;&amp;nbsp;&amp;nbsp; &amp;nbsp;&amp;nbsp;&amp;nbsp; Coprocessor Family Ext&amp;nbsp;&amp;nbsp;&amp;nbsp; &amp;nbsp;: 0x00&lt;BR /&gt;
	&amp;nbsp;&amp;nbsp;&amp;nbsp; &amp;nbsp;&amp;nbsp;&amp;nbsp; Coprocessor Stepping &amp;nbsp;&amp;nbsp;&amp;nbsp; &amp;nbsp;: B1&lt;BR /&gt;
	&amp;nbsp;&amp;nbsp;&amp;nbsp; &amp;nbsp;&amp;nbsp;&amp;nbsp; Board SKU &amp;nbsp;&amp;nbsp;&amp;nbsp; &amp;nbsp;&amp;nbsp;&amp;nbsp; &amp;nbsp;: B1PRQ-5110P/5120D&lt;BR /&gt;
	&amp;nbsp;&amp;nbsp;&amp;nbsp; &amp;nbsp;&amp;nbsp;&amp;nbsp; ECC Mode &amp;nbsp;&amp;nbsp;&amp;nbsp; &amp;nbsp;&amp;nbsp;&amp;nbsp; &amp;nbsp;: Enabled&lt;BR /&gt;
	&amp;nbsp;&amp;nbsp;&amp;nbsp; &amp;nbsp;&amp;nbsp;&amp;nbsp; SMC HW Revision &amp;nbsp;&amp;nbsp;&amp;nbsp; &amp;nbsp;: Product 225W Passive CS&lt;/P&gt;</description>
      <pubDate>Tue, 10 Dec 2013 19:17:47 GMT</pubDate>
      <guid>https://community.intel.com/t5/Software-Archive/User-Controlled-Power-Management/m-p/934797#M15612</guid>
      <dc:creator>Andrey_R_</dc:creator>
      <dc:date>2013-12-10T19:17:47Z</dc:date>
    </item>
    <item>
      <title>Andrey,</title>
      <link>https://community.intel.com/t5/Software-Archive/User-Controlled-Power-Management/m-p/934798#M15613</link>
      <description>&lt;P&gt;Andrey,&lt;/P&gt;

&lt;P&gt;Excellent questions. I am consulting the experts here at Intel.&lt;/P&gt;

&lt;P&gt;Note: As it is the holiday season, the experts may not be available until the new year. I will do my best to get you an answer before then.&lt;/P&gt;

&lt;P&gt;Regards&lt;BR /&gt;
	--&lt;BR /&gt;
	Taylor&lt;BR /&gt;
	&amp;nbsp;&lt;/P&gt;</description>
      <pubDate>Tue, 10 Dec 2013 22:49:25 GMT</pubDate>
      <guid>https://community.intel.com/t5/Software-Archive/User-Controlled-Power-Management/m-p/934798#M15613</guid>
      <dc:creator>TaylorIoTKidd</dc:creator>
      <dc:date>2013-12-10T22:49:25Z</dc:date>
    </item>
    <item>
      <title>Taylor, I have read a number</title>
      <link>https://community.intel.com/t5/Software-Archive/User-Controlled-Power-Management/m-p/934799#M15614</link>
      <description>&lt;P&gt;Taylor, I have read a number of your posts at Intel blog on power management and they were very helpful. Thank you for that and for your reply!&lt;/P&gt;</description>
      <pubDate>Wed, 11 Dec 2013 10:35:30 GMT</pubDate>
      <guid>https://community.intel.com/t5/Software-Archive/User-Controlled-Power-Management/m-p/934799#M15614</guid>
      <dc:creator>Andrey_R_</dc:creator>
      <dc:date>2013-12-11T10:35:30Z</dc:date>
    </item>
    <item>
      <title>Thanks. Your question is</title>
      <link>https://community.intel.com/t5/Software-Archive/User-Controlled-Power-Management/m-p/934800#M15615</link>
      <description>&lt;P&gt;Thanks. Your question is great because I am starting a new blog series on measuring power come the new year.&lt;/P&gt;

&lt;P&gt;&amp;nbsp;&lt;/P&gt;</description>
      <pubDate>Wed, 11 Dec 2013 18:12:58 GMT</pubDate>
      <guid>https://community.intel.com/t5/Software-Archive/User-Controlled-Power-Management/m-p/934800#M15615</guid>
      <dc:creator>TaylorIoTKidd</dc:creator>
      <dc:date>2013-12-11T18:12:58Z</dc:date>
    </item>
    <item>
      <title>After updating MPSS version</title>
      <link>https://community.intel.com/t5/Software-Archive/User-Controlled-Power-Management/m-p/934801#M15616</link>
      <description>&lt;P&gt;After updating MPSS version to the following one:&lt;/P&gt;

&lt;P&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp; Version&lt;BR /&gt;
	&amp;nbsp;&amp;nbsp;&amp;nbsp; &amp;nbsp;&amp;nbsp;&amp;nbsp; Flash Version &amp;nbsp;&amp;nbsp;&amp;nbsp; &amp;nbsp;&amp;nbsp;&amp;nbsp; &amp;nbsp;: 2.1.02.0390&lt;BR /&gt;
	&amp;nbsp;&amp;nbsp;&amp;nbsp; &amp;nbsp;&amp;nbsp;&amp;nbsp; SMC Firmware Version&amp;nbsp;&amp;nbsp;&amp;nbsp; &amp;nbsp;: 1.16.5078&lt;BR /&gt;
	&amp;nbsp;&amp;nbsp;&amp;nbsp; &amp;nbsp;&amp;nbsp;&amp;nbsp; SMC Boot Loader Version&amp;nbsp;&amp;nbsp;&amp;nbsp; &amp;nbsp;: 1.8.4326&lt;BR /&gt;
	&amp;nbsp;&amp;nbsp;&amp;nbsp; &amp;nbsp;&amp;nbsp;&amp;nbsp; uOS Version &amp;nbsp;&amp;nbsp;&amp;nbsp; &amp;nbsp;&amp;nbsp;&amp;nbsp; &amp;nbsp;: 2.6.38.8+mpss3.1.1&lt;BR /&gt;
	&amp;nbsp;&amp;nbsp;&amp;nbsp; &amp;nbsp;&amp;nbsp;&amp;nbsp; Device Serial Number &amp;nbsp;&amp;nbsp;&amp;nbsp; &amp;nbsp;: ADKC25101431&lt;/P&gt;

&lt;P&gt;the voltage variabilty on the same test became insignificant +- 0.001V.&lt;/P&gt;</description>
      <pubDate>Thu, 03 Apr 2014 19:06:08 GMT</pubDate>
      <guid>https://community.intel.com/t5/Software-Archive/User-Controlled-Power-Management/m-p/934801#M15616</guid>
      <dc:creator>Andrey_R_</dc:creator>
      <dc:date>2014-04-03T19:06:08Z</dc:date>
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