topic My understanding is that no in Software Archive

Native MIC compile error: undefined reference

Patrick_S_ — Tue, 17 Dec 2013 00:47:14 GMT

Hey all,

i'm currently trying to compile the following native Intel Intrinsics code.

for ( std::size_t k = 0; k < n; k += 16 ) {

x_ = _mm512_load_ps( x + k );

u_ = _mm512_load_ps( u + k );

xhd_ = _mm512_movehdup_ps( x_ );

upm_ = _mm512_permute_ps( u_, 177 );

hdpm_ = _mm512_mul_ps( xhd_, upm_ );

xld_ = _mm512_moveldup_ps( x_ );

cmplx_ = _mm512_fmaddsub_ps( xld_, u_, hdpm_ );

_mm512_store_ps( x + k , cmplx_ );

}

and thereby I get a compile error:

mic_test.cpp:(.text+0x1097): undefined reference to `_mm512_movehdup_ps'

mic_test.cpp:(.text+0x10b1): undefined reference to `_mm512_permute_ps'

mic_test.cpp:(.text+0x10ce): undefined reference to `_mm512_moveldup_ps'

mic_test.cpp:(.text+0x10e8): undefined reference to `_mm512_fmaddsub_round_ps'

I have included immintrin.h, the memory is 64 byte aligned and I checked

http://software.intel.com/en-us/comment/1726413#comment-1726413

But the Problem is that my program runs in native mode. I don't use pragmas for offloading the code to the MIC.

The strange thing is that a similar code:

for ( std::size_t k = 0; k < n; k += 16 ) {

x_ = _mm512_load_ps( x + k );

z_ = _mm512_load_ps( z + k );

u_ = _mm512_load_ps( u + k );

v_ = _mm512_load_ps( v + k );

zv_ = _mm512_mul_ps( z_, v_ );

real_ = _mm512_fmsub_ps( x_, u_, zv_);

zu_ = _mm512_mul_ps( z_, u_ );

imag_ = _mm512_fmadd_ps( x_, v_, zu_);

_mm512_store_ps( x + k , real_ );

_mm512_store_ps( z + k , imag_ );

}

compiles and runs without problems on the MIC.

Thanks,

Patrick

The AVX 512 instructions and

Kevin_D_Intel — Tue, 17 Dec 2013 17:07:14 GMT

The AVX 512 instructions and those particular unresolved intrinsics (discussed in the C++ UG here: http://software.intel.com/en-us/node/485150) are not currently available for Intel Xeon Phi™. They will be available with Knight’s Landing. There is a nice discussion in James’ blog: http://software.intel.com/en-us/blogs/2013/avx-512-instructions.

Is it documented which AVX512

Patrick_S_ — Tue, 17 Dec 2013 23:09:15 GMT

Is it documented which AVX512 Intrinsics will work on the current Xeon Phi? or do I have to test each Intrinsics function?

Can I use an inline assembly instruction e.g. vmovshdup instead of _mm512_movehdup_ps? Or did you mean that the whole AVX Instruction ist not available?

My understanding is that no

Charles_C_Intel1 — Tue, 17 Dec 2013 23:25:15 GMT

My understanding is that no AVX512 instrincs or instructions work on the current Xeon Phi coprocessor ("Knight's Corner"). Yes, Knights Corner has 512-bit operations, but they are not the same as the AVX512 operations. Sorry.

A lot of AVX512 Intrinsics

Patrick_S_ — Tue, 17 Dec 2013 23:27:54 GMT

A lot of AVX512 Intrinsics work!

for example this code:

x_ = _mm512_load_ps( x + k );

z_ = _mm512_load_ps( z + k );

u_ = _mm512_load_ps( u + k );

v_ = _mm512_load_ps( v + k );

zv_ = _mm512_mul_ps( z_, v_ );

real_ = _mm512_fmsub_ps( x_, u_, zv_);

zu_ = _mm512_mul_ps( z_, u_ );

imag_ = _mm512_fmadd_ps( x_, v_, zu_);

_mm512_store_ps( x + k , real_ );

_mm512_store_ps( z + k , imag_ );

ah ok. Am I right that this

Patrick_S_ — Tue, 17 Dec 2013 23:59:00 GMT

ah ok. Am I right that this link

http://software.intel.com/en-us/node/460862

is the list for all Intrinsics functions that are available for Knights Corner?

Yes, you are right.

Kevin_D_Intel — Wed, 18 Dec 2013 09:19:08 GMT

Yes, you are right.

ok, thanks :)

Patrick_S_ — Wed, 18 Dec 2013 11:19:22 GMT

ok, thanks :)