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    <title>topic Any ideas about this issue? in Software Archive</title>
    <link>https://community.intel.com/t5/Software-Archive/icpc-generates-vector-instructions-for-normal-C-and-causes/m-p/962156#M22025</link>
    <description>&lt;P&gt;Any ideas about this issue?&lt;/P&gt;</description>
    <pubDate>Mon, 20 May 2013 11:04:25 GMT</pubDate>
    <dc:creator>Teodor_P_</dc:creator>
    <dc:date>2013-05-20T11:04:25Z</dc:date>
    <item>
      <title>icpc generates vector instructions for normal C++ and causes crashes</title>
      <link>https://community.intel.com/t5/Software-Archive/icpc-generates-vector-instructions-for-normal-C-and-causes/m-p/962155#M22024</link>
      <description>&lt;P&gt;Hi,&lt;/P&gt;
&lt;P&gt;I'm trying to port our large application to run natively on the Xeon Phi card.&lt;/P&gt;
&lt;P&gt;I've compiled it but there are some problems and I think the problems are related to the compiler and that it generates bad code.&lt;/P&gt;
&lt;P&gt;The compiler I'm using is:&lt;/P&gt;
&lt;BLOCKQUOTE&gt;
&lt;P&gt;$ icpc -V Intel(R) C++ Intel(R) 64 Compiler XE for applications running on Intel(R) 64, Version 13.1.1.163 Build 20130313 Copyright (C) 1985-2013 Intel Corporation. All rights reserved.&lt;/P&gt;
&lt;/BLOCKQUOTE&gt;
&lt;P&gt;And the build options are something like:&lt;/P&gt;
&lt;BLOCKQUOTE&gt;
&lt;P&gt;&amp;nbsp; Compiler: icpc&lt;BR /&gt;&amp;nbsp; Optimizations: -gxx-name=g++412 -gcc-name=gcc412 -O0 -g -fPIC -mmic&amp;nbsp; -D_REENTRANT -static-intel -fvisibility=hidden &lt;BR /&gt;&amp;nbsp; Link flags: -static-intel -lpthread -lrt -lc&amp;nbsp;&amp;nbsp; -Wl,--gc-sections&amp;nbsp; -fPIC&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; -mmic&lt;/P&gt;
&lt;/BLOCKQUOTE&gt;
&lt;P&gt;The compiler has produced this code and the crash happens on the last instruction (rax=0x7ff15418330e and k1=1)&lt;/P&gt;
&lt;BLOCKQUOTE&gt;
&lt;P&gt;0x00007ff176d056f8 &amp;lt;init&amp;gt;:&amp;nbsp;&amp;nbsp; &amp;nbsp;pushq&amp;nbsp; %rbp&lt;BR /&gt;0x00007ff176d056f9 &amp;lt;init+1&amp;gt;:&amp;nbsp;&amp;nbsp; &amp;nbsp;mov %rsp, %rbp&lt;BR /&gt;0x00007ff176d056fc &amp;lt;init+4&amp;gt;:&amp;nbsp;&amp;nbsp; &amp;nbsp;sub $0x20, %rsp&lt;BR /&gt;0x00007ff176d05700 &amp;lt;init+8&amp;gt;:&amp;nbsp;&amp;nbsp; &amp;nbsp;movq&amp;nbsp; %rdi, -0x20(%rbp)&lt;BR /&gt;0x00007ff176d05704 &amp;lt;init+12&amp;gt;:&amp;nbsp;&amp;nbsp; &amp;nbsp;movq&amp;nbsp; -0x20(%rbp), %rax&lt;BR /&gt;0x00007ff176d05708 &amp;lt;init+16&amp;gt;:&amp;nbsp;&amp;nbsp; &amp;nbsp;movq&amp;nbsp; %rax, -0x18(%rbp)&lt;BR /&gt;0x00007ff176d0570c &amp;lt;init+20&amp;gt;:&amp;nbsp;&amp;nbsp; &amp;nbsp;vbroadcastssl&amp;nbsp; 0xb3651e(%rip), %k0, %zmm0&lt;BR /&gt;0x00007ff176d05716 &amp;lt;init+30&amp;gt;:&amp;nbsp;&amp;nbsp; &amp;nbsp;movq&amp;nbsp; -0x18(%rbp), %rax&lt;BR /&gt;0x00007ff176d0571a &amp;lt;init+34&amp;gt;:&amp;nbsp;&amp;nbsp; &amp;nbsp;mov $0x1, %edx&lt;BR /&gt;0x00007ff176d0571f &amp;lt;init+39&amp;gt;:&amp;nbsp;&amp;nbsp; &amp;nbsp;kmov %rdx, %k1&lt;BR /&gt;0x00007ff176d05723 &amp;lt;init+43&amp;gt;:&amp;nbsp;&amp;nbsp; &amp;nbsp;vpackstorelps %zmm0, %k1, (%rax)&lt;/P&gt;
&lt;/BLOCKQUOTE&gt;
&lt;P&gt;As far as I could understand from the Instruction set reference the vpackstorelps requires the address to be 64-byte aligned, which is not the case here. Am I correct in this understanding? Is this a bug in the compiler or something is wrong in my code?&lt;/P&gt;
&lt;P&gt;The function looks like this:&lt;/P&gt;
&lt;BLOCKQUOTE&gt;
&lt;P&gt;void init() {&lt;/P&gt;
&lt;P&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; pmin.set(some_const, some_const, some_const);&lt;/P&gt;
&lt;P&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; pmax.set(some_const, some_const, some_const);&lt;/P&gt;
&lt;P&gt;}&lt;/P&gt;
&lt;/BLOCKQUOTE&gt;
&lt;P&gt;pmin and pmax are Vectors and the set function looks like this:&lt;/P&gt;
&lt;BLOCKQUOTE&gt;
&lt;P&gt;__forceinline void set(float ix, float iy, float iz) {&lt;/P&gt;
&lt;P&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; x=ix;&lt;/P&gt;
&lt;P&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; y=iy;&lt;/P&gt;
&lt;P&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; z=iz;&lt;/P&gt;
&lt;P&gt;}&lt;/P&gt;
&lt;/BLOCKQUOTE&gt;
&lt;P&gt;Could this __forceinline call mess up the compiler?&lt;/P&gt;
&lt;P&gt;Also the memory for the object holding the pmin,pmax is freshly allcated by new.&lt;/P&gt;
&lt;P&gt;Any help with this issue will be highly appreciated.&lt;/P&gt;
&lt;P&gt;Best regards,&lt;/P&gt;
&lt;P&gt;Teodor Petrov&lt;/P&gt;
&lt;P&gt;&lt;BR /&gt;&lt;BR /&gt;&lt;/P&gt;</description>
      <pubDate>Wed, 15 May 2013 18:12:53 GMT</pubDate>
      <guid>https://community.intel.com/t5/Software-Archive/icpc-generates-vector-instructions-for-normal-C-and-causes/m-p/962155#M22024</guid>
      <dc:creator>Teodor_P_</dc:creator>
      <dc:date>2013-05-15T18:12:53Z</dc:date>
    </item>
    <item>
      <title>Any ideas about this issue?</title>
      <link>https://community.intel.com/t5/Software-Archive/icpc-generates-vector-instructions-for-normal-C-and-causes/m-p/962156#M22025</link>
      <description>&lt;P&gt;Any ideas about this issue?&lt;/P&gt;</description>
      <pubDate>Mon, 20 May 2013 11:04:25 GMT</pubDate>
      <guid>https://community.intel.com/t5/Software-Archive/icpc-generates-vector-instructions-for-normal-C-and-causes/m-p/962156#M22025</guid>
      <dc:creator>Teodor_P_</dc:creator>
      <dc:date>2013-05-20T11:04:25Z</dc:date>
    </item>
    <item>
      <title>Teodor,</title>
      <link>https://community.intel.com/t5/Software-Archive/icpc-generates-vector-instructions-for-normal-C-and-causes/m-p/962157#M22026</link>
      <description>&lt;P&gt;Teodor,&lt;/P&gt;
&lt;P&gt;vpackstorelps requires that memory address be aligned to at least 4 bytes. Using __forceinline is OK in this case.&lt;/P&gt;
&lt;P&gt;The assembly that you posted implies that the the root-cause is a pointer aligned to 2-bytes passed to this function.&lt;/P&gt;
&lt;P&gt;Thanks,&lt;/P&gt;
&lt;P&gt;Evgueni.&lt;/P&gt;</description>
      <pubDate>Mon, 20 May 2013 15:47:00 GMT</pubDate>
      <guid>https://community.intel.com/t5/Software-Archive/icpc-generates-vector-instructions-for-normal-C-and-causes/m-p/962157#M22026</guid>
      <dc:creator>Evgueni_P_Intel</dc:creator>
      <dc:date>2013-05-20T15:47:00Z</dc:date>
    </item>
    <item>
      <title>Evgueni,</title>
      <link>https://community.intel.com/t5/Software-Archive/icpc-generates-vector-instructions-for-normal-C-and-causes/m-p/962158#M22027</link>
      <description>&lt;P&gt;Evgueni,&lt;/P&gt;
&lt;P&gt;Is this a compiler bug or a bug in my program?&lt;/P&gt;
&lt;P&gt;/Teodor&lt;/P&gt;</description>
      <pubDate>Mon, 20 May 2013 16:19:41 GMT</pubDate>
      <guid>https://community.intel.com/t5/Software-Archive/icpc-generates-vector-instructions-for-normal-C-and-causes/m-p/962158#M22027</guid>
      <dc:creator>Teodor_P_</dc:creator>
      <dc:date>2013-05-20T16:19:41Z</dc:date>
    </item>
    <item>
      <title>Quote:Teodor P. wrote:</title>
      <link>https://community.intel.com/t5/Software-Archive/icpc-generates-vector-instructions-for-normal-C-and-causes/m-p/962159#M22028</link>
      <description>&lt;P&gt;&lt;/P&gt;&lt;BLOCKQUOTE&gt;Teodor P. wrote:&lt;BR /&gt;&lt;P&gt;&lt;/P&gt;
&lt;P&gt;Is this a compiler bug or a bug in my program?&lt;/P&gt;
&lt;P&gt;&lt;/P&gt;&lt;/BLOCKQUOTE&gt;&lt;P&gt;&lt;/P&gt;
&lt;P&gt;Without seeing your source it's impossible to tell. The completely abstract version you posted doesn't have the detail needed to be able even to guess at what is going on.&lt;/P&gt;</description>
      <pubDate>Mon, 20 May 2013 16:30:55 GMT</pubDate>
      <guid>https://community.intel.com/t5/Software-Archive/icpc-generates-vector-instructions-for-normal-C-and-causes/m-p/962159#M22028</guid>
      <dc:creator>James_C_Intel2</dc:creator>
      <dc:date>2013-05-20T16:30:55Z</dc:date>
    </item>
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