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    <title>topic Quote:rhn wrote: in Software Archive</title>
    <link>https://community.intel.com/t5/Software-Archive/Booting-a-Non-Linux-OS/m-p/962948#M22229</link>
    <description>&lt;P&gt;&lt;/P&gt;&lt;BLOCKQUOTE&gt;rhn wrote:&lt;BR /&gt;&lt;P&gt;&lt;/P&gt;

&lt;P&gt;&lt;SPAN style="font-size: 1em; line-height: 1.5;"&gt;There's a check the host driver makes against SCRATCH2 register bit 0, but that value seems to be controlled by the boot loader.&lt;/SPAN&gt;&lt;/P&gt;

&lt;P&gt;&lt;/P&gt;&lt;/BLOCKQUOTE&gt;&lt;P&gt;&lt;/P&gt;

&lt;P&gt;if you boot the ELF way writing a 0x1 to SCRATCH2 will tell the host that its booted successfully. When booting the Linux way, there needs to be a SCIF based handshake.&amp;nbsp;&lt;/P&gt;</description>
    <pubDate>Wed, 02 Apr 2014 16:11:15 GMT</pubDate>
    <dc:creator>Reto_A_</dc:creator>
    <dc:date>2014-04-02T16:11:15Z</dc:date>
    <item>
      <title>Booting a Non-Linux OS</title>
      <link>https://community.intel.com/t5/Software-Archive/Booting-a-Non-Linux-OS/m-p/962942#M22223</link>
      <description>&lt;P&gt;I want to boot a non-linux OS on the Xeon Phi. Is there any documentation on that?&amp;nbsp;&lt;/P&gt;

&lt;P&gt;From the MPSS User Guide:&lt;/P&gt;

&lt;P&gt;&lt;EM&gt;"&lt;SPAN style="font-size: 1em; line-height: 1.5;"&gt;The second part of the boot argument indicates to boot a Linux* image. It may also be&amp;nbsp;&lt;/SPAN&gt;&lt;SPAN style="font-size: 1em; line-height: 1.5;"&gt;set to elf to indicate booting a standard ELF format file. Documenting non-Linux* boot is&amp;nbsp;&lt;/SPAN&gt;&lt;SPAN style="font-size: 1em; line-height: 1.5;"&gt;beyond the scope of this document."&lt;/SPAN&gt;&lt;/EM&gt;&lt;/P&gt;

&lt;P&gt;Is it possible to boot an elf-x86_64 (no unsupported vector instructions used) or does the elf need to be an elf-k1om? What is the entry point of the elf and can it be used to bootstrap the card OS?&lt;/P&gt;

&lt;P&gt;There are two further questions that arise:&lt;BR /&gt;
	-&amp;nbsp;How can the host be informed that the system is ready?&lt;BR /&gt;
	- How can the coprocessor OS write to the serial console (which arrives at /dev/ttyMICx on the host) ?&lt;/P&gt;

&lt;P&gt;It is basically which SBOX registers do I have to set to which values?&amp;nbsp;&lt;/P&gt;

&lt;P&gt;&amp;nbsp;&lt;/P&gt;

&lt;P&gt;Thanks for any replies on the questions.&lt;/P&gt;</description>
      <pubDate>Thu, 27 Mar 2014 19:48:26 GMT</pubDate>
      <guid>https://community.intel.com/t5/Software-Archive/Booting-a-Non-Linux-OS/m-p/962942#M22223</guid>
      <dc:creator>Reto_A_</dc:creator>
      <dc:date>2014-03-27T19:48:26Z</dc:date>
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    <item>
      <title>I don't know of any specific</title>
      <link>https://community.intel.com/t5/Software-Archive/Booting-a-Non-Linux-OS/m-p/962943#M22224</link>
      <description>&lt;P&gt;I don't know of any specific Intel information but there have been other threads on this topic. See&amp;nbsp;http://software.intel.com/en-us/forums/topic/489529.&lt;/P&gt;

&lt;P&gt;Regards&lt;BR /&gt;
	--&lt;BR /&gt;
	Taylor&lt;BR /&gt;
	&amp;nbsp;&lt;/P&gt;</description>
      <pubDate>Fri, 28 Mar 2014 15:18:15 GMT</pubDate>
      <guid>https://community.intel.com/t5/Software-Archive/Booting-a-Non-Linux-OS/m-p/962943#M22224</guid>
      <dc:creator>TaylorIoTKidd</dc:creator>
      <dc:date>2014-03-28T15:18:15Z</dc:date>
    </item>
    <item>
      <title>Quote:Taylor Kidd (Intel)</title>
      <link>https://community.intel.com/t5/Software-Archive/Booting-a-Non-Linux-OS/m-p/962944#M22225</link>
      <description>&lt;P&gt;&lt;/P&gt;&lt;BLOCKQUOTE&gt;Taylor Kidd (Intel) wrote:&lt;BR /&gt;&lt;P&gt;&lt;/P&gt;

&lt;P&gt;I don't know of any specific Intel information but there have been other threads on this topic. See&amp;nbsp;&lt;A href="http://software.intel.com/en-us/forums/topic/489529"&gt;http://software.intel.com/en-us/forums/topic/489529&lt;/A&gt;.&lt;/P&gt;

&lt;P&gt;&lt;SPAN style="font-size: 1em; line-height: 1.5;"&gt;&lt;/SPAN&gt;&lt;/P&gt;&lt;/BLOCKQUOTE&gt;&lt;P&gt;&lt;/P&gt;

&lt;P&gt;OK, I managed to boot an elf-64. How can I get serial output from the card to the host when booting a elf-64?&lt;/P&gt;

&lt;P&gt;The documentation says:&lt;/P&gt;

&lt;P&gt;Intel® Xeon Phi™ coprocessor hardware supports a serial console using the serial port device on the SBOX I2C bus.&lt;/P&gt;</description>
      <pubDate>Sat, 29 Mar 2014 21:52:05 GMT</pubDate>
      <guid>https://community.intel.com/t5/Software-Archive/Booting-a-Non-Linux-OS/m-p/962944#M22225</guid>
      <dc:creator>Reto_A_</dc:creator>
      <dc:date>2014-03-29T21:52:05Z</dc:date>
    </item>
    <item>
      <title>Serial output requires a</title>
      <link>https://community.intel.com/t5/Software-Archive/Booting-a-Non-Linux-OS/m-p/962945#M22226</link>
      <description>&lt;P&gt;&lt;SPAN style="font-size: 1em; line-height: 1.5;"&gt;Serial output requires a "POST card," a small circuit board with two 7-segment displays (for the two-character boot progress code) and the UART in question. The board is connected to the Xeon Phi with an I2C cable that resembles one of those CD-audio cables used in computer optical drives about a decade ago. So, you'd need a POST card and a Xeon Phi with the appropriate connector soldered down.... On the engineering team, the former have always been in short supply and the latter were unavailable, so we'd hand-solder the missing connectors.&lt;/SPAN&gt;&lt;/P&gt;

&lt;P&gt;In any case, because the UART is on the far side of an I2C bus, you'd need a rather thick driver stack to access it, more than would be desirable for early boot messages, and indeed MPSS's Linux kernel is not capable of using that UART for early_printk.&amp;nbsp;&lt;SPAN style="font-size: 1em; line-height: 1.5;"&gt;Honestly, I suggest you print to an in-memory ring buffer (see the host mic.ko's code for reading the Linux dmesg buffer across PCIe) or emulate a serial port with a pair of such rings (see the card's michvc.ko code and its companion bits in the host's mic.ko).&lt;/SPAN&gt;&lt;/P&gt;</description>
      <pubDate>Mon, 31 Mar 2014 16:21:20 GMT</pubDate>
      <guid>https://community.intel.com/t5/Software-Archive/Booting-a-Non-Linux-OS/m-p/962945#M22226</guid>
      <dc:creator>Evan_P_Intel</dc:creator>
      <dc:date>2014-03-31T16:21:20Z</dc:date>
    </item>
    <item>
      <title>Thanks Evan for clearing up</title>
      <link>https://community.intel.com/t5/Software-Archive/Booting-a-Non-Linux-OS/m-p/962946#M22227</link>
      <description>&lt;P&gt;Thanks Evan for clearing up the misleading information in the documentation.&lt;/P&gt;

&lt;P&gt;&amp;nbsp;&lt;/P&gt;</description>
      <pubDate>Tue, 01 Apr 2014 15:11:06 GMT</pubDate>
      <guid>https://community.intel.com/t5/Software-Archive/Booting-a-Non-Linux-OS/m-p/962946#M22227</guid>
      <dc:creator>Reto_A_</dc:creator>
      <dc:date>2014-04-01T15:11:06Z</dc:date>
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    <item>
      <title>Quote:Reto A. wrote:</title>
      <link>https://community.intel.com/t5/Software-Archive/Booting-a-Non-Linux-OS/m-p/962947#M22228</link>
      <description>&lt;P&gt;&lt;/P&gt;&lt;BLOCKQUOTE&gt;Reto A. wrote:&lt;BR /&gt;&lt;P&gt;&lt;/P&gt;

&lt;P&gt;-&amp;nbsp;How can the host be informed that the system is ready?&lt;/P&gt;

&lt;P&gt;&lt;/P&gt;&lt;/BLOCKQUOTE&gt;&lt;P&gt;&lt;/P&gt;

&lt;P&gt;If the system has been successfully booted, post code will be FF (ASCII encoded in SBOX address 0x242c). There's a check the host driver makes against SCRATCH2 register bit 0, but that value seems to be controlled by the boot loader.&lt;/P&gt;

&lt;P&gt;If there's some better way, I'm interested myself.&lt;/P&gt;</description>
      <pubDate>Wed, 02 Apr 2014 09:32:18 GMT</pubDate>
      <guid>https://community.intel.com/t5/Software-Archive/Booting-a-Non-Linux-OS/m-p/962947#M22228</guid>
      <dc:creator>rhn</dc:creator>
      <dc:date>2014-04-02T09:32:18Z</dc:date>
    </item>
    <item>
      <title>Quote:rhn wrote:</title>
      <link>https://community.intel.com/t5/Software-Archive/Booting-a-Non-Linux-OS/m-p/962948#M22229</link>
      <description>&lt;P&gt;&lt;/P&gt;&lt;BLOCKQUOTE&gt;rhn wrote:&lt;BR /&gt;&lt;P&gt;&lt;/P&gt;

&lt;P&gt;&lt;SPAN style="font-size: 1em; line-height: 1.5;"&gt;There's a check the host driver makes against SCRATCH2 register bit 0, but that value seems to be controlled by the boot loader.&lt;/SPAN&gt;&lt;/P&gt;

&lt;P&gt;&lt;/P&gt;&lt;/BLOCKQUOTE&gt;&lt;P&gt;&lt;/P&gt;

&lt;P&gt;if you boot the ELF way writing a 0x1 to SCRATCH2 will tell the host that its booted successfully. When booting the Linux way, there needs to be a SCIF based handshake.&amp;nbsp;&lt;/P&gt;</description>
      <pubDate>Wed, 02 Apr 2014 16:11:15 GMT</pubDate>
      <guid>https://community.intel.com/t5/Software-Archive/Booting-a-Non-Linux-OS/m-p/962948#M22229</guid>
      <dc:creator>Reto_A_</dc:creator>
      <dc:date>2014-04-02T16:11:15Z</dc:date>
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