<?xml version="1.0" encoding="UTF-8"?>
<rss xmlns:content="http://purl.org/rss/1.0/modules/content/" xmlns:dc="http://purl.org/dc/elements/1.1/" xmlns:rdf="http://www.w3.org/1999/02/22-rdf-syntax-ns#" xmlns:taxo="http://purl.org/rss/1.0/modules/taxonomy/" version="2.0">
  <channel>
    <title>topic Hi Alin - I confirmed those in Software Archive</title>
    <link>https://community.intel.com/t5/Software-Archive/loop-unrolling-issues-on-MIC/m-p/968203#M23372</link>
    <description>&lt;P&gt;Hi Alin - I confirmed those findings too and reported it to Development (see internal tracking id below) for deeper analysis. I’ll keep you posted.&lt;/P&gt;
&lt;P&gt;(Internal tracking id: DPD200247006)&lt;/P&gt;</description>
    <pubDate>Thu, 08 Aug 2013 21:03:21 GMT</pubDate>
    <dc:creator>Kevin_D_Intel</dc:creator>
    <dc:date>2013-08-08T21:03:21Z</dc:date>
    <item>
      <title>loop unrolling issues on MIC</title>
      <link>https://community.intel.com/t5/Software-Archive/loop-unrolling-issues-on-MIC/m-p/968189#M23358</link>
      <description>&lt;P&gt;Hi,&lt;/P&gt;
&lt;P&gt;I am trying to play with an Intel MIC.&lt;/P&gt;
&lt;P&gt;I have hit an issue which I traced back to unrolling.&lt;/P&gt;
&lt;P&gt;It seems that the compiler fails to unroll loops that contain constants in the expressions. I have attached a small code showing the issue.&amp;nbsp;&lt;/P&gt;
&lt;P&gt;the problem goes around this part&lt;/P&gt;
&lt;P&gt;t1=omp_get_wtime()&lt;BR /&gt;&amp;nbsp; do i=1,ns&lt;BR /&gt;&amp;nbsp; &amp;nbsp; a=a/real(n1,pr)&lt;BR /&gt;&amp;nbsp; enddo&lt;BR /&gt;&amp;nbsp;t1=omp_get_wtime()-t1&lt;/P&gt;
&lt;P&gt;a above is an array. if n1 is a paremeter I get the first time below, if n1 is a normal variable I get the second time.&lt;/P&gt;
&lt;P&gt;The second line in the output corresponds to explicity writting the a loop.&lt;/P&gt;
&lt;P&gt;~/lavello/XeonPhi/arrays $ ./arrays.MIC&lt;BR /&gt;15.201463 0.71788597 &lt;BR /&gt;15.435404 0.71788788&lt;/P&gt;
&lt;P&gt;the same code in c++ (only with explicit loops)&lt;/P&gt;
&lt;P&gt;~/lavello/XeonPhi/arrays $ ./arrays.xx &lt;BR /&gt;0.015044 0.0153539&lt;/P&gt;
&lt;P&gt;here is the vectorisation report for fortran that show the issue... the loops that contain expressions with parameter types get unrolled to 2 while the ones containing normal variables to 8.&lt;/P&gt;
&lt;P&gt;ifort -openmp -O3 -mmic -o arrays.MIC arrays.F90 -vec-report7&lt;BR /&gt;arrays.F90(20): (col. 5) remark: vectorization support: reference c has aligned access.&lt;BR /&gt;arrays.F90(19): (col. 5) remark: vectorization support: reference a has aligned access.&lt;BR /&gt;arrays.F90(18): (col. 3) remark: PARTIAL LOOP WAS VECTORIZED.&lt;BR /&gt;arrays.F90(24): (col. 5) remark: vectorization support: reference a has aligned access.&lt;BR /&gt;arrays.F90(24): (col. 5) remark: vectorization support: reference a has aligned access.&lt;BR /&gt;arrays.F90(24): (col. 5) remark: vectorization support: unroll factor set to 2.&lt;BR /&gt;arrays.F90(24): (col. 5) remark: LOOP WAS VECTORIZED.&lt;BR /&gt;arrays.F90(30): (col. 5) remark: vectorization support: reference c has aligned access.&lt;BR /&gt;arrays.F90(30): (col. 5) remark: vectorization support: reference c has aligned access.&lt;BR /&gt;arrays.F90(30): (col. 5) remark: vectorization support: unroll factor set to 8.&lt;BR /&gt;arrays.F90(30): (col. 5) remark: LOOP WAS VECTORIZED.&lt;BR /&gt;arrays.F90(37): (col. 5) remark: vectorization support: reference a has aligned access.&lt;BR /&gt;arrays.F90(37): (col. 5) remark: vectorization support: reference a has aligned access.&lt;BR /&gt;arrays.F90(36): (col. 4) remark: vectorization support: unroll factor set to 2.&lt;BR /&gt;arrays.F90(36): (col. 4) remark: LOOP WAS VECTORIZED.&lt;BR /&gt;arrays.F90(45): (col. 5) remark: vectorization support: reference c has aligned access.&lt;BR /&gt;arrays.F90(45): (col. 5) remark: vectorization support: reference c has aligned access.&lt;BR /&gt;arrays.F90(44): (col. 4) remark: vectorization support: unroll factor set to 8.&lt;BR /&gt;arrays.F90(44): (col. 4) remark: LOOP WAS VECTORIZED.&lt;/P&gt;
&lt;P&gt;in c++ case both loops have the same unroll factor&lt;/P&gt;
&lt;P&gt;[alin@phinally:~/lavello/XeonPhi/arrays]: icpc -o arrays.xx arrays.cxx -openmp -O3 -vec-report6 -mmic &lt;BR /&gt;arrays.cxx(13): (col. 10) remark: vectorization support: reference b has aligned access.&lt;BR /&gt;arrays.cxx(13): (col. 5) remark: vectorization support: reference a has aligned access.&lt;BR /&gt;arrays.cxx(12): (col. 3) remark: LOOP WAS VECTORIZED.&lt;BR /&gt;arrays.cxx(19): (col. 5) remark: vectorization support: reference a has aligned access.&lt;BR /&gt;arrays.cxx(19): (col. 5) remark: vectorization support: reference a has aligned access.&lt;BR /&gt;arrays.cxx(18): (col. 4) remark: vectorization support: unroll factor set to 8.&lt;BR /&gt;arrays.cxx(18): (col. 4) remark: LOOP WAS VECTORIZED.&lt;BR /&gt;arrays.cxx(17): (col. 3) remark: loop was not vectorized: not inner loop.&lt;BR /&gt;arrays.cxx(27): (col. 5) remark: vectorization support: reference b has aligned access.&lt;BR /&gt;arrays.cxx(27): (col. 5) remark: vectorization support: reference b has aligned access.&lt;BR /&gt;arrays.cxx(26): (col. 5) remark: vectorization support: unroll factor set to 8.&lt;BR /&gt;arrays.cxx(26): (col. 5) remark: LOOP WAS VECTORIZED.&lt;BR /&gt;arrays.cxx(25): (col. 3) remark: loop was not vectorized: not inner loop.&lt;/P&gt;
&lt;P&gt;the versions of my compilers are&lt;/P&gt;
&lt;P&gt;[alin@phinally:~/lavello/XeonPhi/arrays]: ifort --version&lt;BR /&gt;ifort (IFORT) 13.0.1 20121010&lt;BR /&gt;Copyright (C) 1985-2012 Intel Corporation. All rights reserved.&lt;/P&gt;
&lt;P&gt;[alin@phinally:~/lavello/XeonPhi/arrays]: icpc --version&lt;BR /&gt;icpc (ICC) 13.0.1 20121010&lt;BR /&gt;Copyright (C) 1985-2012 Intel Corporation. All rights reserved.&lt;/P&gt;
&lt;P&gt;&lt;/P&gt;
&lt;P&gt;&lt;/P&gt;</description>
      <pubDate>Fri, 02 Aug 2013 16:35:20 GMT</pubDate>
      <guid>https://community.intel.com/t5/Software-Archive/loop-unrolling-issues-on-MIC/m-p/968189#M23358</guid>
      <dc:creator>Alin_M_Elena</dc:creator>
      <dc:date>2013-08-02T16:35:20Z</dc:date>
    </item>
    <item>
      <title>I suppose you may need to</title>
      <link>https://community.intel.com/t5/Software-Archive/loop-unrolling-issues-on-MIC/m-p/968190#M23359</link>
      <description>&lt;P&gt;I suppose you may need to examine generated code and see whether one case has been optimized down to a simple multiplication by a constant, but not another.&amp;nbsp; It's difficult to draw conclusions when you test the compiler's ability to optimize away unused code.&amp;nbsp; It looks like you are using a rather old compiler (in terms of MIC releases).&lt;/P&gt;</description>
      <pubDate>Fri, 02 Aug 2013 17:31:53 GMT</pubDate>
      <guid>https://community.intel.com/t5/Software-Archive/loop-unrolling-issues-on-MIC/m-p/968190#M23359</guid>
      <dc:creator>TimP</dc:creator>
      <dc:date>2013-08-02T17:31:53Z</dc:date>
    </item>
    <item>
      <title>Hi Tim,</title>
      <link>https://community.intel.com/t5/Software-Archive/loop-unrolling-issues-on-MIC/m-p/968191#M23360</link>
      <description>&lt;P&gt;Hi Tim,&lt;/P&gt;
&lt;P&gt;Thank you for your answer... I will try to get access to a newer compiler... but the code was compiled with the latest version and the same behaviour was obtained.&lt;/P&gt;
&lt;P&gt;I do not understand your comment on unused code. can you be more specific what you mean by it.&amp;nbsp;&lt;/P&gt;
&lt;P&gt;I find it strange that it unrolls correctly in the case of c++ but not fortran...and also I find it strange that unrolling seems to depend on the fact that a data is a constants or not (in the context of the loop none of them changes value).&lt;/P&gt;
&lt;P&gt;regards,&lt;/P&gt;
&lt;P&gt;Alin&lt;/P&gt;</description>
      <pubDate>Sat, 03 Aug 2013 07:37:00 GMT</pubDate>
      <guid>https://community.intel.com/t5/Software-Archive/loop-unrolling-issues-on-MIC/m-p/968191#M23360</guid>
      <dc:creator>Alin_M_Elena</dc:creator>
      <dc:date>2013-08-03T07:37:00Z</dc:date>
    </item>
    <item>
      <title>I have updated the compiler..</title>
      <link>https://community.intel.com/t5/Software-Archive/loop-unrolling-issues-on-MIC/m-p/968192#M23361</link>
      <description>&lt;P&gt;I have updated the compiler...&amp;nbsp;&lt;/P&gt;
&lt;P&gt;I see now there is a level 7 of reporting for vectorisation&lt;/P&gt;
&lt;P&gt;[alin@phinally:~/lavello/XeonPhi/arrays]: ifort -openmp -O3 -mmic -o arrays.MIC arrays.F90 -vec-report6&lt;BR /&gt;arrays.F90(20): (col. 5) remark: vectorization support: unaligned store will be scalarized.&lt;BR /&gt;arrays.F90(19): (col. 5) remark: vectorization support: unaligned store will be scalarized.&lt;BR /&gt;arrays.F90(20): (col. 5) remark: vectorization support: reference c has aligned access.&lt;BR /&gt;arrays.F90(19): (col. 5) remark: vectorization support: reference a has aligned access.&lt;BR /&gt;arrays.F90(20): (col. 5) remark: vectorization support: unaligned store will be scalarized.&lt;BR /&gt;arrays.F90(19): (col. 5) remark: vectorization support: unaligned store will be scalarized.&lt;BR /&gt;arrays.F90(18): (col. 3) remark: PARTIAL LOOP WAS VECTORIZED.&lt;BR /&gt;arrays.F90(24): (col. 5) remark: vectorization support: unroll factor set to 2.&lt;BR /&gt;arrays.F90(24): (col. 5) remark: vectorization support: unaligned store will be scalarized.&lt;BR /&gt;arrays.F90(24): (col. 5) remark: vectorization support: unaligned load will be scalarized.&lt;BR /&gt;arrays.F90(24): (col. 5) remark: vectorization support: reference a has aligned access.&lt;BR /&gt;arrays.F90(24): (col. 5) remark: vectorization support: reference a has aligned access.&lt;BR /&gt;arrays.F90(24): (col. 5) remark: vectorization support: unaligned store will be scalarized.&lt;BR /&gt;arrays.F90(24): (col. 5) remark: vectorization support: unaligned load will be scalarized.&lt;BR /&gt;arrays.F90(24): (col. 5) remark: LOOP WAS VECTORIZED.&lt;BR /&gt;arrays.F90(23): (col. 3) remark: loop was not vectorized: not inner loop.&lt;BR /&gt;arrays.F90(30): (col. 5) remark: vectorization support: unroll factor set to 16.&lt;BR /&gt;arrays.F90(30): (col. 5) remark: vectorization support: unaligned store will be scalarized.&lt;BR /&gt;arrays.F90(30): (col. 5) remark: vectorization support: unaligned load will be scalarized.&lt;BR /&gt;arrays.F90(30): (col. 5) remark: vectorization support: reference c has aligned access.&lt;BR /&gt;arrays.F90(30): (col. 5) remark: vectorization support: reference c has aligned access.&lt;BR /&gt;arrays.F90(30): (col. 5) remark: vectorization support: unaligned store will be scalarized.&lt;BR /&gt;arrays.F90(30): (col. 5) remark: vectorization support: unaligned load will be scalarized.&lt;BR /&gt;arrays.F90(30): (col. 5) remark: LOOP WAS VECTORIZED.&lt;BR /&gt;arrays.F90(29): (col. 3) remark: loop was not vectorized: not inner loop.&lt;BR /&gt;arrays.F90(36): (col. 4) remark: vectorization support: unroll factor set to 2.&lt;BR /&gt;arrays.F90(37): (col. 5) remark: vectorization support: unaligned store will be scalarized.&lt;BR /&gt;arrays.F90(37): (col. 10) remark: vectorization support: unaligned load will be scalarized.&lt;BR /&gt;arrays.F90(37): (col. 5) remark: vectorization support: reference a has aligned access.&lt;BR /&gt;arrays.F90(37): (col. 5) remark: vectorization support: reference a has aligned access.&lt;BR /&gt;arrays.F90(37): (col. 5) remark: vectorization support: unaligned store will be scalarized.&lt;BR /&gt;arrays.F90(37): (col. 10) remark: vectorization support: unaligned load will be scalarized.&lt;BR /&gt;arrays.F90(36): (col. 4) remark: LOOP WAS VECTORIZED.&lt;BR /&gt;arrays.F90(35): (col. 3) remark: loop was not vectorized: not inner loop.&lt;BR /&gt;arrays.F90(44): (col. 4) remark: vectorization support: unroll factor set to 16.&lt;BR /&gt;arrays.F90(45): (col. 5) remark: vectorization support: unaligned store will be scalarized.&lt;BR /&gt;arrays.F90(45): (col. 10) remark: vectorization support: unaligned load will be scalarized.&lt;BR /&gt;arrays.F90(45): (col. 5) remark: vectorization support: reference c has aligned access.&lt;BR /&gt;arrays.F90(45): (col. 5) remark: vectorization support: reference c has aligned access.&lt;BR /&gt;arrays.F90(45): (col. 5) remark: vectorization support: unaligned store will be scalarized.&lt;BR /&gt;arrays.F90(45): (col. 10) remark: vectorization support: unaligned load will be scalarized.&lt;BR /&gt;arrays.F90(44): (col. 4) remark: LOOP WAS VECTORIZED.&lt;BR /&gt;arrays.F90(43): (col. 3) remark: loop was not vectorized: not inner loop.&lt;BR /&gt;[alin@phinally:~/lavello/XeonPhi/arrays]: ifort -openmp -O3 -mmic -o arrays.MIC arrays.F90 -vec-report7&lt;BR /&gt;arrays.F90(18): (col. 3) remark: VEC#00001NPNR 1.&lt;BR /&gt;arrays.F90(18): (col. 3) remark: VEC#00052 1.&lt;BR /&gt;arrays.F90(18): (col. 3) remark: VEC#00204 30.&lt;BR /&gt;arrays.F90(18): (col. 3) remark: VEC#00207 2.&lt;BR /&gt;arrays.F90(18): (col. 3) remark: VEC#00213 4.&lt;BR /&gt;arrays.F90(24): (col. 5) remark: VEC#00001NPNR 1.&lt;BR /&gt;arrays.F90(24): (col. 5) remark: VEC#00052 2.&lt;BR /&gt;arrays.F90(24): (col. 5) remark: VEC#00101UUSL 1.&lt;BR /&gt;arrays.F90(24): (col. 5) remark: VEC#00101UUSS 1.&lt;BR /&gt;arrays.F90(24): (col. 5) remark: VEC#00201 105.&lt;BR /&gt;arrays.F90(24): (col. 5) remark: VEC#00202 105.000000.&lt;BR /&gt;arrays.F90(24): (col. 5) remark: VEC#00203 12.000000.&lt;BR /&gt;arrays.F90(24): (col. 5) remark: VEC#00204 35.&lt;BR /&gt;arrays.F90(24): (col. 5) remark: VEC#00212 3.&lt;BR /&gt;arrays.F90(30): (col. 5) remark: VEC#00001NPNR 1.&lt;BR /&gt;arrays.F90(30): (col. 5) remark: VEC#00052 2.&lt;BR /&gt;arrays.F90(30): (col. 5) remark: VEC#00101UUSL 1.&lt;BR /&gt;arrays.F90(30): (col. 5) remark: VEC#00101UUSS 1.&lt;BR /&gt;arrays.F90(30): (col. 5) remark: VEC#00201 15.&lt;BR /&gt;arrays.F90(30): (col. 5) remark: VEC#00202 20.500000.&lt;BR /&gt;arrays.F90(30): (col. 5) remark: VEC#00203 12.820000.&lt;BR /&gt;arrays.F90(30): (col. 5) remark: VEC#00204 35.&lt;BR /&gt;arrays.F90(36): (col. 4) remark: VEC#00001NPNR 1.&lt;BR /&gt;arrays.F90(36): (col. 4) remark: VEC#00052 2.&lt;BR /&gt;arrays.F90(36): (col. 4) remark: VEC#00101UUSL 1.&lt;BR /&gt;arrays.F90(36): (col. 4) remark: VEC#00101UUSS 1.&lt;BR /&gt;arrays.F90(36): (col. 4) remark: VEC#00201 105.&lt;BR /&gt;arrays.F90(36): (col. 4) remark: VEC#00202 105.000000.&lt;BR /&gt;arrays.F90(36): (col. 4) remark: VEC#00203 12.000000.&lt;BR /&gt;arrays.F90(36): (col. 4) remark: VEC#00204 35.&lt;BR /&gt;arrays.F90(36): (col. 4) remark: VEC#00212 3.&lt;BR /&gt;arrays.F90(44): (col. 4) remark: VEC#00001NPNR 1.&lt;BR /&gt;arrays.F90(44): (col. 4) remark: VEC#00052 2.&lt;BR /&gt;arrays.F90(44): (col. 4) remark: VEC#00101UUSL 1.&lt;BR /&gt;arrays.F90(44): (col. 4) remark: VEC#00101UUSS 1.&lt;BR /&gt;arrays.F90(44): (col. 4) remark: VEC#00201 15.&lt;BR /&gt;arrays.F90(44): (col. 4) remark: VEC#00202 20.500000.&lt;BR /&gt;arrays.F90(44): (col. 4) remark: VEC#00203 12.820000.&lt;BR /&gt;arrays.F90(44): (col. 4) remark: VEC#00204 35.&lt;/P&gt;
&lt;P&gt;&lt;/P&gt;
&lt;P&gt;now it turns out that the good loop is unrolled even more...&lt;/P&gt;
&lt;P&gt;~/lavello/XeonPhi/arrays $ ./arrays.MIC &lt;BR /&gt; 15.195465 0.30842900 &lt;BR /&gt; 14.081736 0.30841279&lt;/P&gt;
&lt;P&gt;To complicate things even more if I disable unrolling... the situation does not seem to change for the "bad" loop&lt;/P&gt;
&lt;P&gt;[alin@phinally:~/lavello/XeonPhi/arrays]: ifort -openmp -O3 -mmic -o arrays.MIC arrays.F90 -unroll0 -vec-report6&lt;BR /&gt;arrays.F90(20): (col. 5) remark: vectorization support: unaligned store will be scalarized.&lt;BR /&gt;arrays.F90(19): (col. 5) remark: vectorization support: unaligned store will be scalarized.&lt;BR /&gt;arrays.F90(20): (col. 5) remark: vectorization support: reference c has aligned access.&lt;BR /&gt;arrays.F90(19): (col. 5) remark: vectorization support: reference a has aligned access.&lt;BR /&gt;arrays.F90(20): (col. 5) remark: vectorization support: unaligned store will be scalarized.&lt;BR /&gt;arrays.F90(19): (col. 5) remark: vectorization support: unaligned store will be scalarized.&lt;BR /&gt;arrays.F90(18): (col. 3) remark: PARTIAL LOOP WAS VECTORIZED.&lt;BR /&gt;arrays.F90(24): (col. 5) remark: vectorization support: unaligned store will be scalarized.&lt;BR /&gt;arrays.F90(24): (col. 5) remark: vectorization support: unaligned load will be scalarized.&lt;BR /&gt;arrays.F90(24): (col. 5) remark: vectorization support: reference a has aligned access.&lt;BR /&gt;arrays.F90(24): (col. 5) remark: vectorization support: reference a has aligned access.&lt;BR /&gt;arrays.F90(24): (col. 5) remark: vectorization support: unaligned store will be scalarized.&lt;BR /&gt;arrays.F90(24): (col. 5) remark: vectorization support: unaligned load will be scalarized.&lt;BR /&gt;arrays.F90(24): (col. 5) remark: LOOP WAS VECTORIZED.&lt;BR /&gt;arrays.F90(23): (col. 3) remark: loop was not vectorized: not inner loop.&lt;BR /&gt;arrays.F90(30): (col. 5) remark: vectorization support: unaligned store will be scalarized.&lt;BR /&gt;arrays.F90(30): (col. 5) remark: vectorization support: unaligned load will be scalarized.&lt;BR /&gt;arrays.F90(30): (col. 5) remark: vectorization support: reference c has aligned access.&lt;BR /&gt;arrays.F90(30): (col. 5) remark: vectorization support: reference c has aligned access.&lt;BR /&gt;arrays.F90(30): (col. 5) remark: vectorization support: unaligned store will be scalarized.&lt;BR /&gt;arrays.F90(30): (col. 5) remark: vectorization support: unaligned load will be scalarized.&lt;BR /&gt;arrays.F90(30): (col. 5) remark: LOOP WAS VECTORIZED.&lt;BR /&gt;arrays.F90(29): (col. 3) remark: loop was not vectorized: not inner loop.&lt;BR /&gt;arrays.F90(37): (col. 5) remark: vectorization support: unaligned store will be scalarized.&lt;BR /&gt;arrays.F90(37): (col. 10) remark: vectorization support: unaligned load will be scalarized.&lt;BR /&gt;arrays.F90(37): (col. 5) remark: vectorization support: reference a has aligned access.&lt;BR /&gt;arrays.F90(37): (col. 5) remark: vectorization support: reference a has aligned access.&lt;BR /&gt;arrays.F90(37): (col. 5) remark: vectorization support: unaligned store will be scalarized.&lt;BR /&gt;arrays.F90(37): (col. 10) remark: vectorization support: unaligned load will be scalarized.&lt;BR /&gt;arrays.F90(36): (col. 4) remark: LOOP WAS VECTORIZED.&lt;BR /&gt;arrays.F90(35): (col. 3) remark: loop was not vectorized: not inner loop.&lt;BR /&gt;arrays.F90(45): (col. 5) remark: vectorization support: unaligned store will be scalarized.&lt;BR /&gt;arrays.F90(45): (col. 10) remark: vectorization support: unaligned load will be scalarized.&lt;BR /&gt;arrays.F90(45): (col. 5) remark: vectorization support: reference c has aligned access.&lt;BR /&gt;arrays.F90(45): (col. 5) remark: vectorization support: reference c has aligned access.&lt;BR /&gt;arrays.F90(45): (col. 5) remark: vectorization support: unaligned store will be scalarized.&lt;BR /&gt;arrays.F90(45): (col. 10) remark: vectorization support: unaligned load will be scalarized.&lt;BR /&gt;arrays.F90(44): (col. 4) remark: LOOP WAS VECTORIZED.&lt;BR /&gt;arrays.F90(43): (col. 3) remark: loop was not vectorized: not inner loop.&lt;BR /&gt;[alin@phinally:~/lavello/XeonPhi/arrays]: ifort -openmp -O3 -mmic -o arrays.MIC arrays.F90 -unroll0 -vec-report7&lt;BR /&gt;arrays.F90(18): (col. 3) remark: VEC#00001NPNR 1.&lt;BR /&gt;arrays.F90(18): (col. 3) remark: VEC#00052 1.&lt;BR /&gt;arrays.F90(18): (col. 3) remark: VEC#00204 30.&lt;BR /&gt;arrays.F90(18): (col. 3) remark: VEC#00207 2.&lt;BR /&gt;arrays.F90(18): (col. 3) remark: VEC#00213 4.&lt;BR /&gt;arrays.F90(24): (col. 5) remark: VEC#00001NPNR 1.&lt;BR /&gt;arrays.F90(24): (col. 5) remark: VEC#00052 2.&lt;BR /&gt;arrays.F90(24): (col. 5) remark: VEC#00101UUSL 1.&lt;BR /&gt;arrays.F90(24): (col. 5) remark: VEC#00101UUSS 1.&lt;BR /&gt;arrays.F90(24): (col. 5) remark: VEC#00201 70.&lt;BR /&gt;arrays.F90(24): (col. 5) remark: VEC#00202 17.500000.&lt;BR /&gt;arrays.F90(24): (col. 5) remark: VEC#00203 8.000000.&lt;BR /&gt;arrays.F90(24): (col. 5) remark: VEC#00204 25.&lt;BR /&gt;arrays.F90(24): (col. 5) remark: VEC#00212 2.&lt;BR /&gt;arrays.F90(30): (col. 5) remark: VEC#00001NPNR 1.&lt;BR /&gt;arrays.F90(30): (col. 5) remark: VEC#00052 2.&lt;BR /&gt;arrays.F90(30): (col. 5) remark: VEC#00101UUSL 1.&lt;BR /&gt;arrays.F90(30): (col. 5) remark: VEC#00101UUSS 1.&lt;BR /&gt;arrays.F90(30): (col. 5) remark: VEC#00201 10.&lt;BR /&gt;arrays.F90(30): (col. 5) remark: VEC#00202 2.500000.&lt;BR /&gt;arrays.F90(30): (col. 5) remark: VEC#00203 7.960000.&lt;BR /&gt;arrays.F90(30): (col. 5) remark: VEC#00204 25.&lt;BR /&gt;arrays.F90(36): (col. 4) remark: VEC#00001NPNR 1.&lt;BR /&gt;arrays.F90(36): (col. 4) remark: VEC#00052 2.&lt;BR /&gt;arrays.F90(36): (col. 4) remark: VEC#00101UUSL 1.&lt;BR /&gt;arrays.F90(36): (col. 4) remark: VEC#00101UUSS 1.&lt;BR /&gt;arrays.F90(36): (col. 4) remark: VEC#00201 70.&lt;BR /&gt;arrays.F90(36): (col. 4) remark: VEC#00202 17.500000.&lt;BR /&gt;arrays.F90(36): (col. 4) remark: VEC#00203 8.000000.&lt;BR /&gt;arrays.F90(36): (col. 4) remark: VEC#00204 25.&lt;BR /&gt;arrays.F90(36): (col. 4) remark: VEC#00212 2.&lt;BR /&gt;arrays.F90(44): (col. 4) remark: VEC#00001NPNR 1.&lt;BR /&gt;arrays.F90(44): (col. 4) remark: VEC#00052 2.&lt;BR /&gt;arrays.F90(44): (col. 4) remark: VEC#00101UUSL 1.&lt;BR /&gt;arrays.F90(44): (col. 4) remark: VEC#00101UUSS 1.&lt;BR /&gt;arrays.F90(44): (col. 4) remark: VEC#00201 10.&lt;BR /&gt;arrays.F90(44): (col. 4) remark: VEC#00202 2.500000.&lt;BR /&gt;arrays.F90(44): (col. 4) remark: VEC#00203 7.960000.&lt;BR /&gt;arrays.F90(44): (col. 4) remark: VEC#00204 25.&lt;BR /&gt;[alin@phinally:~/lavello/XeonPhi/arrays]: ssh mic0&lt;BR /&gt;~ $ cd ~/lavello/XeonPhi/arrays&lt;BR /&gt;~/lavello/XeonPhi/arrays $ ./arrays.MIC &lt;BR /&gt; 14.075157 0.52774692 &lt;BR /&gt; 14.069236 0.52784920&lt;/P&gt;
&lt;P&gt;I will try next to get the results with optimisation turned off..&lt;/P&gt;
&lt;P&gt;regards,&lt;/P&gt;
&lt;P&gt;Alin&lt;/P&gt;</description>
      <pubDate>Sat, 03 Aug 2013 08:09:20 GMT</pubDate>
      <guid>https://community.intel.com/t5/Software-Archive/loop-unrolling-issues-on-MIC/m-p/968192#M23361</guid>
      <dc:creator>Alin_M_Elena</dc:creator>
      <dc:date>2013-08-03T08:09:20Z</dc:date>
    </item>
    <item>
      <title>here are the results with</title>
      <link>https://community.intel.com/t5/Software-Archive/loop-unrolling-issues-on-MIC/m-p/968193#M23362</link>
      <description>&lt;P&gt;here are the results with unroll0 and increasing the optimisation level from O0 to O2&lt;/P&gt;
&lt;P&gt;[alin@phinally:~/lavello/XeonPhi/arrays]: ifort -openmp -O0 -mmic -o arrays.MIC arrays.F90 -unroll0 -vec-report7&lt;BR /&gt;[alin@phinally:~/lavello/XeonPhi/arrays]: ssh mic0&lt;BR /&gt;~ $ cd ~/lavello/XeonPhi/arrays&lt;BR /&gt;~/lavello/XeonPhi/arrays $ ./arrays.MIC &lt;BR /&gt; 31.092502 31.458152 &lt;BR /&gt; 31.185777 31.564384 &lt;BR /&gt;~/lavello/XeonPhi/arrays $ Connection to mic0 closed.&lt;BR /&gt;[alin@phinally:~/lavello/XeonPhi/arrays]: ifort -openmp -O1 -mmic -o arrays.MIC arrays.F90 -unroll0 -vec-report7&lt;BR /&gt;[alin@phinally:~/lavello/XeonPhi/arrays]: ssh mic0&lt;BR /&gt;~ $ cd ~/lavello/XeonPhi/arrays&lt;BR /&gt;~/lavello/XeonPhi/arrays $ ./arrays.MIC &lt;BR /&gt; 29.891860 29.940608 &lt;BR /&gt; 29.886266 29.938223 &lt;BR /&gt;~/lavello/XeonPhi/arrays $ Connection to mic0 closed.&lt;BR /&gt;[alin@phinally:~/lavello/XeonPhi/arrays]: ifort -openmp -O2 -mmic -o arrays.MIC arrays.F90 -unroll0 -vec-report6&lt;BR /&gt;arrays.F90(20): (col. 5) remark: vectorization support: unaligned store will be scalarized.&lt;BR /&gt;arrays.F90(19): (col. 5) remark: vectorization support: unaligned store will be scalarized.&lt;BR /&gt;arrays.F90(20): (col. 5) remark: vectorization support: reference c has aligned access.&lt;BR /&gt;arrays.F90(19): (col. 5) remark: vectorization support: reference a has aligned access.&lt;BR /&gt;arrays.F90(20): (col. 5) remark: vectorization support: unaligned store will be scalarized.&lt;BR /&gt;arrays.F90(19): (col. 5) remark: vectorization support: unaligned store will be scalarized.&lt;BR /&gt;arrays.F90(18): (col. 3) remark: PARTIAL LOOP WAS VECTORIZED.&lt;BR /&gt;arrays.F90(24): (col. 5) remark: vectorization support: unaligned store will be scalarized.&lt;BR /&gt;arrays.F90(24): (col. 5) remark: vectorization support: unaligned load will be scalarized.&lt;BR /&gt;arrays.F90(24): (col. 5) remark: vectorization support: reference a has aligned access.&lt;BR /&gt;arrays.F90(24): (col. 5) remark: vectorization support: reference a has aligned access.&lt;BR /&gt;arrays.F90(24): (col. 5) remark: vectorization support: unaligned store will be scalarized.&lt;BR /&gt;arrays.F90(24): (col. 5) remark: vectorization support: unaligned load will be scalarized.&lt;BR /&gt;arrays.F90(24): (col. 5) remark: LOOP WAS VECTORIZED.&lt;BR /&gt;arrays.F90(23): (col. 3) remark: loop was not vectorized: not inner loop.&lt;BR /&gt;arrays.F90(30): (col. 5) remark: vectorization support: unaligned store will be scalarized.&lt;BR /&gt;arrays.F90(30): (col. 5) remark: vectorization support: unaligned load will be scalarized.&lt;BR /&gt;arrays.F90(30): (col. 5) remark: vectorization support: reference c has aligned access.&lt;BR /&gt;arrays.F90(30): (col. 5) remark: vectorization support: reference c has aligned access.&lt;BR /&gt;arrays.F90(30): (col. 5) remark: vectorization support: unaligned store will be scalarized.&lt;BR /&gt;arrays.F90(30): (col. 5) remark: vectorization support: unaligned load will be scalarized.&lt;BR /&gt;arrays.F90(30): (col. 5) remark: LOOP WAS VECTORIZED.&lt;BR /&gt;arrays.F90(29): (col. 3) remark: loop was not vectorized: not inner loop.&lt;BR /&gt;arrays.F90(37): (col. 5) remark: vectorization support: unaligned store will be scalarized.&lt;BR /&gt;arrays.F90(37): (col. 10) remark: vectorization support: unaligned load will be scalarized.&lt;BR /&gt;arrays.F90(37): (col. 5) remark: vectorization support: reference a has aligned access.&lt;BR /&gt;arrays.F90(37): (col. 5) remark: vectorization support: reference a has aligned access.&lt;BR /&gt;arrays.F90(37): (col. 5) remark: vectorization support: unaligned store will be scalarized.&lt;BR /&gt;arrays.F90(37): (col. 10) remark: vectorization support: unaligned load will be scalarized.&lt;BR /&gt;arrays.F90(36): (col. 4) remark: LOOP WAS VECTORIZED.&lt;BR /&gt;arrays.F90(35): (col. 3) remark: loop was not vectorized: not inner loop.&lt;BR /&gt;arrays.F90(45): (col. 5) remark: vectorization support: unaligned store will be scalarized.&lt;BR /&gt;arrays.F90(45): (col. 10) remark: vectorization support: unaligned load will be scalarized.&lt;BR /&gt;arrays.F90(45): (col. 5) remark: vectorization support: reference c has aligned access.&lt;BR /&gt;arrays.F90(45): (col. 5) remark: vectorization support: reference c has aligned access.&lt;BR /&gt;arrays.F90(45): (col. 5) remark: vectorization support: unaligned store will be scalarized.&lt;BR /&gt;arrays.F90(45): (col. 10) remark: vectorization support: unaligned load will be scalarized.&lt;BR /&gt;arrays.F90(44): (col. 4) remark: LOOP WAS VECTORIZED.&lt;BR /&gt;arrays.F90(43): (col. 3) remark: loop was not vectorized: not inner loop.&lt;BR /&gt;[alin@phinally:~/lavello/XeonPhi/arrays]: ifort -openmp -O2 -mmic -o arrays.MIC arrays.F90 -unroll0 -vec-report7&lt;BR /&gt;arrays.F90(18): (col. 3) remark: VEC#00001NPNR 1.&lt;BR /&gt;arrays.F90(18): (col. 3) remark: VEC#00052 1.&lt;BR /&gt;arrays.F90(18): (col. 3) remark: VEC#00204 30.&lt;BR /&gt;arrays.F90(18): (col. 3) remark: VEC#00207 2.&lt;BR /&gt;arrays.F90(18): (col. 3) remark: VEC#00213 4.&lt;BR /&gt;arrays.F90(24): (col. 5) remark: VEC#00001NPNR 1.&lt;BR /&gt;arrays.F90(24): (col. 5) remark: VEC#00052 2.&lt;BR /&gt;arrays.F90(24): (col. 5) remark: VEC#00101UUSL 1.&lt;BR /&gt;arrays.F90(24): (col. 5) remark: VEC#00101UUSS 1.&lt;BR /&gt;arrays.F90(24): (col. 5) remark: VEC#00201 70.&lt;BR /&gt;arrays.F90(24): (col. 5) remark: VEC#00202 17.500000.&lt;BR /&gt;arrays.F90(24): (col. 5) remark: VEC#00203 8.000000.&lt;BR /&gt;arrays.F90(24): (col. 5) remark: VEC#00204 25.&lt;BR /&gt;arrays.F90(24): (col. 5) remark: VEC#00212 2.&lt;BR /&gt;arrays.F90(30): (col. 5) remark: VEC#00001NPNR 1.&lt;BR /&gt;arrays.F90(30): (col. 5) remark: VEC#00052 2.&lt;BR /&gt;arrays.F90(30): (col. 5) remark: VEC#00101UUSL 1.&lt;BR /&gt;arrays.F90(30): (col. 5) remark: VEC#00101UUSS 1.&lt;BR /&gt;arrays.F90(30): (col. 5) remark: VEC#00201 10.&lt;BR /&gt;arrays.F90(30): (col. 5) remark: VEC#00202 2.500000.&lt;BR /&gt;arrays.F90(30): (col. 5) remark: VEC#00203 7.960000.&lt;BR /&gt;arrays.F90(30): (col. 5) remark: VEC#00204 25.&lt;BR /&gt;arrays.F90(36): (col. 4) remark: VEC#00001NPNR 1.&lt;BR /&gt;arrays.F90(36): (col. 4) remark: VEC#00052 2.&lt;BR /&gt;arrays.F90(36): (col. 4) remark: VEC#00101UUSL 1.&lt;BR /&gt;arrays.F90(36): (col. 4) remark: VEC#00101UUSS 1.&lt;BR /&gt;arrays.F90(36): (col. 4) remark: VEC#00201 70.&lt;BR /&gt;arrays.F90(36): (col. 4) remark: VEC#00202 17.500000.&lt;BR /&gt;arrays.F90(36): (col. 4) remark: VEC#00203 8.000000.&lt;BR /&gt;arrays.F90(36): (col. 4) remark: VEC#00204 25.&lt;BR /&gt;arrays.F90(36): (col. 4) remark: VEC#00212 2.&lt;BR /&gt;arrays.F90(44): (col. 4) remark: VEC#00001NPNR 1.&lt;BR /&gt;arrays.F90(44): (col. 4) remark: VEC#00052 2.&lt;BR /&gt;arrays.F90(44): (col. 4) remark: VEC#00101UUSL 1.&lt;BR /&gt;arrays.F90(44): (col. 4) remark: VEC#00101UUSS 1.&lt;BR /&gt;arrays.F90(44): (col. 4) remark: VEC#00201 10.&lt;BR /&gt;arrays.F90(44): (col. 4) remark: VEC#00202 2.500000.&lt;BR /&gt;arrays.F90(44): (col. 4) remark: VEC#00203 7.960000.&lt;BR /&gt;arrays.F90(44): (col. 4) remark: VEC#00204 25.&lt;BR /&gt;[alin@phinally:~/lavello/XeonPhi/arrays]: ssh mic0&lt;BR /&gt;~ $ cd ~/lavello/XeonPhi/arrays&lt;BR /&gt;~/lavello/XeonPhi/arrays $ ./arrays.MIC &lt;BR /&gt; 14.073770 0.52780604 &lt;BR /&gt; 14.069090 0.52781415&lt;/P&gt;</description>
      <pubDate>Sat, 03 Aug 2013 08:15:34 GMT</pubDate>
      <guid>https://community.intel.com/t5/Software-Archive/loop-unrolling-issues-on-MIC/m-p/968193#M23362</guid>
      <dc:creator>Alin_M_Elena</dc:creator>
      <dc:date>2013-08-03T08:15:34Z</dc:date>
    </item>
    <item>
      <title>FYI I've moved your thread to</title>
      <link>https://community.intel.com/t5/Software-Archive/loop-unrolling-issues-on-MIC/m-p/968194#M23363</link>
      <description>&lt;P&gt;FYI I've moved your thread to the Intel Xeon Phi coprocessor forum where it will likely get the best exposure.&lt;/P&gt;</description>
      <pubDate>Tue, 06 Aug 2013 15:38:35 GMT</pubDate>
      <guid>https://community.intel.com/t5/Software-Archive/loop-unrolling-issues-on-MIC/m-p/968194#M23363</guid>
      <dc:creator>robert-reed</dc:creator>
      <dc:date>2013-08-06T15:38:35Z</dc:date>
    </item>
    <item>
      <title>Thank you Robert... this was</title>
      <link>https://community.intel.com/t5/Software-Archive/loop-unrolling-issues-on-MIC/m-p/968195#M23364</link>
      <description>&lt;P&gt;Thank you Robert... this was exactly what I wanted to ask...&lt;/P&gt;
&lt;P&gt;Can you delete or merge it with this one&amp;nbsp;&lt;A href="http://software.intel.com/en-us/forums/topic/405600"&gt;http://software.intel.com/en-us/forums/topic/405600&lt;/A&gt;&amp;nbsp;?&lt;/P&gt;
&lt;P&gt;regards,&lt;/P&gt;
&lt;P&gt;Alin&lt;/P&gt;</description>
      <pubDate>Tue, 06 Aug 2013 16:09:35 GMT</pubDate>
      <guid>https://community.intel.com/t5/Software-Archive/loop-unrolling-issues-on-MIC/m-p/968195#M23364</guid>
      <dc:creator>Alin_M_Elena</dc:creator>
      <dc:date>2013-08-06T16:09:35Z</dc:date>
    </item>
    <item>
      <title>Hi Alin, I reproduced the</title>
      <link>https://community.intel.com/t5/Software-Archive/loop-unrolling-issues-on-MIC/m-p/968196#M23365</link>
      <description>&lt;P&gt;Hi Alin, I reproduced the reported behavior you noted with the latest compiler (where unrolling is set at 2 and 16). I'll dig a bit deeper from there and post when I know more.&lt;/P&gt;</description>
      <pubDate>Tue, 06 Aug 2013 16:36:45 GMT</pubDate>
      <guid>https://community.intel.com/t5/Software-Archive/loop-unrolling-issues-on-MIC/m-p/968196#M23365</guid>
      <dc:creator>Kevin_D_Intel</dc:creator>
      <dc:date>2013-08-06T16:36:45Z</dc:date>
    </item>
    <item>
      <title>Thank you Kevin!</title>
      <link>https://community.intel.com/t5/Software-Archive/loop-unrolling-issues-on-MIC/m-p/968197#M23366</link>
      <description>&lt;P&gt;Thank you Kevin!&lt;/P&gt;
&lt;P&gt;I have slimmed a little bit the code to make life easier to debug...&amp;nbsp;&lt;/P&gt;
&lt;P&gt;the content of the two loops I have split in two separate subroutines and added a dummy subroutine to prevent the unused code behaviour Tim suggested.&lt;/P&gt;
&lt;P&gt;&amp;nbsp;The same behaviour. I will upload the files if needed.&lt;/P&gt;
&lt;P&gt;regards,&lt;/P&gt;
&lt;P&gt;Alin&lt;/P&gt;</description>
      <pubDate>Tue, 06 Aug 2013 17:07:43 GMT</pubDate>
      <guid>https://community.intel.com/t5/Software-Archive/loop-unrolling-issues-on-MIC/m-p/968197#M23366</guid>
      <dc:creator>Alin_M_Elena</dc:creator>
      <dc:date>2013-08-06T17:07:43Z</dc:date>
    </item>
    <item>
      <title>Alin, Thank you for the other</title>
      <link>https://community.intel.com/t5/Software-Archive/loop-unrolling-issues-on-MIC/m-p/968198#M23367</link>
      <description>&lt;P&gt;Alin, Thank you for the other test cases attached to the other thread. Those were more convenient to analyze.&lt;/P&gt;
&lt;P&gt;With our newest (14.0) compiler (due to release in the next month), both loops report an unroll factor of 2; however, that is not what I see gating performance. loopn.f90 realizes the biggest performance boost from vectorization (that’s including w/o unrolling); however, while loop2.f90 is also reportedly vectorized, the generated code between the two is rather different and as noted, loop2.f90 is about 20x times slower. I directed your test cases to our vectorization developers (under the internal tracking id below) for deeper analysis and will let you know what I hear from them.&lt;/P&gt;
&lt;P&gt;(Internal tracking id: DPD200246949)&lt;/P&gt;</description>
      <pubDate>Wed, 07 Aug 2013 11:21:13 GMT</pubDate>
      <guid>https://community.intel.com/t5/Software-Archive/loop-unrolling-issues-on-MIC/m-p/968198#M23367</guid>
      <dc:creator>Kevin_D_Intel</dc:creator>
      <dc:date>2013-08-07T11:21:13Z</dc:date>
    </item>
    <item>
      <title>Thank you Kevin! I did not</title>
      <link>https://community.intel.com/t5/Software-Archive/loop-unrolling-issues-on-MIC/m-p/968199#M23368</link>
      <description>&lt;P&gt;Thank you Kevin! I did not realise I posted the case in the other topic.&lt;/P&gt;
&lt;P&gt;regards,&lt;BR /&gt;Alin&amp;nbsp;&lt;/P&gt;</description>
      <pubDate>Wed, 07 Aug 2013 14:26:59 GMT</pubDate>
      <guid>https://community.intel.com/t5/Software-Archive/loop-unrolling-issues-on-MIC/m-p/968199#M23368</guid>
      <dc:creator>Alin_M_Elena</dc:creator>
      <dc:date>2013-08-07T14:26:59Z</dc:date>
    </item>
    <item>
      <title>I have seen very similar</title>
      <link>https://community.intel.com/t5/Software-Archive/loop-unrolling-issues-on-MIC/m-p/968200#M23369</link>
      <description>&lt;P&gt;I have seen very similar behaviour with C compiler for Xeon Phi as well. It seems it fails to elevate common expressions outside the loop on most occasions. This is especially visible with chained pointers.&lt;/P&gt;</description>
      <pubDate>Wed, 07 Aug 2013 19:14:30 GMT</pubDate>
      <guid>https://community.intel.com/t5/Software-Archive/loop-unrolling-issues-on-MIC/m-p/968200#M23369</guid>
      <dc:creator>Vladimir_Dergachev</dc:creator>
      <dc:date>2013-08-07T19:14:30Z</dc:date>
    </item>
    <item>
      <title>If you can provide any test</title>
      <link>https://community.intel.com/t5/Software-Archive/loop-unrolling-issues-on-MIC/m-p/968201#M23370</link>
      <description>&lt;P&gt;If you can provide any test case(s) we can direct those to development. For this case the developers are progressing after identifying the root cause related to optimization of complex multiply/divide by a constant.&lt;/P&gt;</description>
      <pubDate>Thu, 08 Aug 2013 08:26:37 GMT</pubDate>
      <guid>https://community.intel.com/t5/Software-Archive/loop-unrolling-issues-on-MIC/m-p/968201#M23370</guid>
      <dc:creator>Kevin_D_Intel</dc:creator>
      <dc:date>2013-08-08T08:26:37Z</dc:date>
    </item>
    <item>
      <title>Hi Kevin,</title>
      <link>https://community.intel.com/t5/Software-Archive/loop-unrolling-issues-on-MIC/m-p/968202#M23371</link>
      <description>&lt;P&gt;Hi Kevin,&lt;/P&gt;
&lt;P&gt;out of curiosity in the case above I have changed from complex(kind=pr) to real(kind=pr)&lt;/P&gt;
&lt;P&gt;now the vec report reads equal unroll factors of 4... but... the times are again different... but the slower one seems to be the one using a variable this time. The difference seems to be a factor of 10... which to be honest I would not expect&lt;/P&gt;
&lt;P&gt;ifort -o arrays.MIC -openmp -mmic -O3 loop2.F90 loopn.F90 arrays.F90 dummy.mico -vec-report6&lt;BR /&gt;loop2.F90(7): (col. 3) remark: vectorization support: unroll factor set to 4.&lt;BR /&gt;loop2.F90(7): (col. 3) remark: vectorization support: unaligned store will be scalarized.&lt;BR /&gt;loop2.F90(7): (col. 3) remark: vectorization support: unaligned load will be scalarized.&lt;BR /&gt;loop2.F90(7): (col. 3) remark: vectorization support: reference x has aligned access.&lt;BR /&gt;loop2.F90(7): (col. 3) remark: vectorization support: reference x has aligned access.&lt;BR /&gt;loop2.F90(7): (col. 3) remark: vectorization support: unaligned store will be scalarized.&lt;BR /&gt;loop2.F90(7): (col. 3) remark: vectorization support: unaligned load will be scalarized.&lt;BR /&gt;loop2.F90(7): (col. 3) remark: LOOP WAS VECTORIZED.&lt;BR /&gt;loop2.F90(7): (col. 3) remark: vectorization support: unaligned store will be scalarized.&lt;BR /&gt;loop2.F90(7): (col. 3) remark: vectorization support: unaligned load will be scalarized.&lt;BR /&gt;loop2.F90(7): (col. 3) remark: vectorization support: unaligned store will be scalarized.&lt;BR /&gt;loop2.F90(7): (col. 3) remark: vectorization support: unaligned load will be scalarized.&lt;BR /&gt;loop2.F90(7): (col. 3) remark: vectorization support: reference x has aligned access.&lt;BR /&gt;loop2.F90(7): (col. 3) remark: vectorization support: reference x has aligned access.&lt;BR /&gt;loop2.F90(7): (col. 3) remark: vectorization support: reference x has aligned access.&lt;BR /&gt;loop2.F90(7): (col. 3) remark: vectorization support: reference x has aligned access.&lt;BR /&gt;loop2.F90(7): (col. 3) remark: vectorization support: unaligned store will be scalarized.&lt;BR /&gt;loop2.F90(7): (col. 3) remark: vectorization support: unaligned load will be scalarized.&lt;BR /&gt;loop2.F90(7): (col. 3) remark: vectorization support: unaligned store will be scalarized.&lt;BR /&gt;loop2.F90(7): (col. 3) remark: vectorization support: unaligned load will be scalarized.&lt;BR /&gt;loop2.F90(7): (col. 3) remark: REMAINDER LOOP WAS VECTORIZED.&lt;BR /&gt;loopn.F90(8): (col. 3) remark: vectorization support: unroll factor set to 4.&lt;BR /&gt;loopn.F90(8): (col. 3) remark: vectorization support: unaligned store will be scalarized.&lt;BR /&gt;loopn.F90(8): (col. 3) remark: vectorization support: unaligned load will be scalarized.&lt;BR /&gt;loopn.F90(8): (col. 3) remark: vectorization support: reference x has aligned access.&lt;BR /&gt;loopn.F90(8): (col. 3) remark: vectorization support: reference x has aligned access.&lt;BR /&gt;loopn.F90(8): (col. 3) remark: vectorization support: unaligned store will be scalarized.&lt;BR /&gt;loopn.F90(8): (col. 3) remark: vectorization support: unaligned load will be scalarized.&lt;BR /&gt;loopn.F90(8): (col. 3) remark: LOOP WAS VECTORIZED.&lt;BR /&gt;loopn.F90(8): (col. 3) remark: vectorization support: unaligned store will be scalarized.&lt;BR /&gt;loopn.F90(8): (col. 3) remark: vectorization support: unaligned load will be scalarized.&lt;BR /&gt;loopn.F90(8): (col. 3) remark: vectorization support: unaligned store will be scalarized.&lt;BR /&gt;loopn.F90(8): (col. 3) remark: vectorization support: unaligned load will be scalarized.&lt;BR /&gt;loopn.F90(8): (col. 3) remark: vectorization support: reference x has aligned access.&lt;BR /&gt;loopn.F90(8): (col. 3) remark: vectorization support: reference x has aligned access.&lt;BR /&gt;loopn.F90(8): (col. 3) remark: vectorization support: reference x has aligned access.&lt;BR /&gt;loopn.F90(8): (col. 3) remark: vectorization support: reference x has aligned access.&lt;BR /&gt;loopn.F90(8): (col. 3) remark: vectorization support: unaligned store will be scalarized.&lt;BR /&gt;loopn.F90(8): (col. 3) remark: vectorization support: unaligned load will be scalarized.&lt;BR /&gt;loopn.F90(8): (col. 3) remark: vectorization support: unaligned store will be scalarized.&lt;BR /&gt;loopn.F90(8): (col. 3) remark: vectorization support: unaligned load will be scalarized.&lt;BR /&gt;loopn.F90(8): (col. 3) remark: REMAINDER LOOP WAS VECTORIZED.&lt;BR /&gt;arrays.F90(20): (col. 5) remark: vectorization support: unaligned store will be scalarized.&lt;BR /&gt;arrays.F90(19): (col. 5) remark: vectorization support: unaligned store will be scalarized.&lt;BR /&gt;arrays.F90(20): (col. 5) remark: vectorization support: reference c has aligned access.&lt;BR /&gt;arrays.F90(19): (col. 5) remark: vectorization support: reference a has aligned access.&lt;BR /&gt;arrays.F90(20): (col. 5) remark: vectorization support: unaligned store will be scalarized.&lt;BR /&gt;arrays.F90(19): (col. 5) remark: vectorization support: unaligned store will be scalarized.&lt;BR /&gt;arrays.F90(18): (col. 3) remark: PARTIAL LOOP WAS VECTORIZED.&lt;BR /&gt;arrays.F90(24): (col. 10) remark: vectorization support: call to function dividen_ cannot be vectorized.&lt;BR /&gt;arrays.F90(23): (col. 3) remark: loop was not vectorized: existence of vector dependence.&lt;BR /&gt;arrays.F90(30): (col. 10) remark: vectorization support: call to function divide2_ cannot be vectorized.&lt;BR /&gt;arrays.F90(29): (col. 3) remark: loop was not vectorized: existence of vector dependence.&lt;/P&gt;
&lt;P&gt;~/lavello/XeonPhi/arrays/real $ ./arrays.MIC &lt;BR /&gt; 0.17513299 0.19222021E-01&lt;/P&gt;
&lt;P&gt;regards,&lt;/P&gt;
&lt;P&gt;Alin&lt;/P&gt;</description>
      <pubDate>Thu, 08 Aug 2013 17:05:48 GMT</pubDate>
      <guid>https://community.intel.com/t5/Software-Archive/loop-unrolling-issues-on-MIC/m-p/968202#M23371</guid>
      <dc:creator>Alin_M_Elena</dc:creator>
      <dc:date>2013-08-08T17:05:48Z</dc:date>
    </item>
    <item>
      <title>Hi Alin - I confirmed those</title>
      <link>https://community.intel.com/t5/Software-Archive/loop-unrolling-issues-on-MIC/m-p/968203#M23372</link>
      <description>&lt;P&gt;Hi Alin - I confirmed those findings too and reported it to Development (see internal tracking id below) for deeper analysis. I’ll keep you posted.&lt;/P&gt;
&lt;P&gt;(Internal tracking id: DPD200247006)&lt;/P&gt;</description>
      <pubDate>Thu, 08 Aug 2013 21:03:21 GMT</pubDate>
      <guid>https://community.intel.com/t5/Software-Archive/loop-unrolling-issues-on-MIC/m-p/968203#M23372</guid>
      <dc:creator>Kevin_D_Intel</dc:creator>
      <dc:date>2013-08-08T21:03:21Z</dc:date>
    </item>
  </channel>
</rss>

