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    <title>topic Thank you Kevin! Great to in Software Archive</title>
    <link>https://community.intel.com/t5/Software-Archive/wrong-offload-wait-transfer-example-code/m-p/978618#M25558</link>
    <description>&lt;P&gt;Thank you Kevin! Great to hear that!&lt;/P&gt;
&lt;P&gt;Alin&lt;/P&gt;</description>
    <pubDate>Mon, 19 Aug 2013 16:57:59 GMT</pubDate>
    <dc:creator>Alin_M_Elena</dc:creator>
    <dc:date>2013-08-19T16:57:59Z</dc:date>
    <item>
      <title>wrong offload wait/transfer example code</title>
      <link>https://community.intel.com/t5/Software-Archive/wrong-offload-wait-transfer-example-code/m-p/978616#M25556</link>
      <description>&lt;P&gt;Hi,&lt;/P&gt;
&lt;P&gt;In this document &lt;BR /&gt;&lt;A href="http://software.intel.com/en-us/node/413108#30B8C09D-9EC7-401B-8CFC-E4FC3649C0AF" target="_blank"&gt;http://software.intel.com/en-us/node/413108#30B8C09D-9EC7-401B-8CFC-E4FC3649C0AF&lt;/A&gt;&lt;BR /&gt;the code listed as example after this&lt;BR /&gt;The following example demonstrates using the OFFLOAD directive, as well as directives OFFLOAD_TRANSFER and OFFLOAD_WAIT.&lt;BR /&gt;crashes due to the use of uninitialised variables for signal and wait in the offload&lt;BR /&gt;replacing the original line&lt;BR /&gt;integer :: sin1, sin2, sout1, sout2&lt;BR /&gt;by&lt;BR /&gt;integer :: sin1=10, sin2=11, sout1=12, sout2=13&lt;BR /&gt;results in a running non crashing example&lt;/P&gt;
&lt;P&gt;original code crashing out&lt;BR /&gt;[aelena00@node002 fortran]$ ./offloadSync.MIX &lt;BR /&gt;USE_RESULT *****************&lt;BR /&gt;USE_RESULT *****************&lt;BR /&gt;USE_RESULT *****************&lt;BR /&gt;USE_RESULT *****************&lt;BR /&gt;USE_RESULT *****************&lt;BR /&gt;USE_RESULT *****************&lt;BR /&gt;USE_RESULT *****************&lt;BR /&gt;USE_RESULT *****************&lt;BR /&gt;USE_RESULT *****************&lt;BR /&gt;USE_RESULT *****************&lt;BR /&gt;offload error: device 0 does not have a pending signal for wait((nil))&lt;BR /&gt;forrtl: error (76): Abort trap signal&lt;BR /&gt;Image PC Routine Line Source &lt;BR /&gt;libc.so.6 0000003A3B6328A5 Unknown Unknown Unknown&lt;BR /&gt;libc.so.6 0000003A3B634085 Unknown Unknown Unknown&lt;BR /&gt;liboffload.so.5 00007FD4C67E6F1E Unknown Unknown Unknown&lt;BR /&gt;liboffload.so.5 00007FD4C67F080D Unknown Unknown Unknown&lt;BR /&gt;offloadSync.MIX 00000000004047E3 Unknown Unknown Unknown&lt;BR /&gt;offloadSync.MIX 00000000004040EA Unknown Unknown Unknown&lt;BR /&gt;offloadSync.MIX 00000000004039FC Unknown Unknown Unknown&lt;BR /&gt;libc.so.6 0000003A3B61ECDD Unknown Unknown Unknown&lt;BR /&gt;offloadSync.MIX 0000000000403889 Unknown Unknown Unknown&lt;BR /&gt;Aborted (core dumped)&lt;/P&gt;
&lt;P&gt;running output:&lt;BR /&gt;[aelena00@node002 fortran]$ ./offloadSync.MIX &lt;BR /&gt;USE_RESULT *****************&lt;BR /&gt;USE_RESULT *****************&lt;BR /&gt;USE_RESULT *****************&lt;BR /&gt;USE_RESULT *****************&lt;BR /&gt;USE_RESULT *****************&lt;BR /&gt;USE_RESULT *****************&lt;BR /&gt;USE_RESULT *****************&lt;BR /&gt;USE_RESULT *****************&lt;BR /&gt;USE_RESULT *****************&lt;BR /&gt;USE_RESULT *****************&lt;BR /&gt;USE_RESULT *****************&lt;BR /&gt;USE_RESULT *****************&lt;BR /&gt;USE_RESULT *****************&lt;BR /&gt;USE_RESULT *****************&lt;BR /&gt;USE_RESULT *****************&lt;BR /&gt;USE_RESULT *****************&lt;BR /&gt;USE_RESULT *****************&lt;BR /&gt;USE_RESULT *****************&lt;BR /&gt;USE_RESULT *****************&lt;BR /&gt;USE_RESULT *****************&lt;BR /&gt;USE_RESULT *****************&lt;BR /&gt;USE_RESULT *****************&lt;BR /&gt;USE_RESULT *****************&lt;BR /&gt;USE_RESULT *****************&lt;BR /&gt;USE_RESULT *****************&lt;BR /&gt;USE_RESULT *****************&lt;BR /&gt;USE_RESULT *****************&lt;BR /&gt;USE_RESULT *****************&lt;BR /&gt;USE_RESULT *****************&lt;BR /&gt;USE_RESULT *****************&lt;/P&gt;
&lt;P&gt;regards,&lt;/P&gt;
&lt;P&gt;Alin&lt;/P&gt;</description>
      <pubDate>Mon, 19 Aug 2013 16:16:26 GMT</pubDate>
      <guid>https://community.intel.com/t5/Software-Archive/wrong-offload-wait-transfer-example-code/m-p/978616#M25556</guid>
      <dc:creator>Alin_M_Elena</dc:creator>
      <dc:date>2013-08-19T16:16:26Z</dc:date>
    </item>
    <item>
      <title>Thank you for the note Alin.</title>
      <link>https://community.intel.com/t5/Software-Archive/wrong-offload-wait-transfer-example-code/m-p/978617#M25557</link>
      <description>&lt;P&gt;Thank you for the note Alin. The noted mistakes in that example are fixed in the documentation for the coming Composer XE 2013 SP1 release (next month).&lt;/P&gt;</description>
      <pubDate>Mon, 19 Aug 2013 16:51:51 GMT</pubDate>
      <guid>https://community.intel.com/t5/Software-Archive/wrong-offload-wait-transfer-example-code/m-p/978617#M25557</guid>
      <dc:creator>Kevin_D_Intel</dc:creator>
      <dc:date>2013-08-19T16:51:51Z</dc:date>
    </item>
    <item>
      <title>Thank you Kevin! Great to</title>
      <link>https://community.intel.com/t5/Software-Archive/wrong-offload-wait-transfer-example-code/m-p/978618#M25558</link>
      <description>&lt;P&gt;Thank you Kevin! Great to hear that!&lt;/P&gt;
&lt;P&gt;Alin&lt;/P&gt;</description>
      <pubDate>Mon, 19 Aug 2013 16:57:59 GMT</pubDate>
      <guid>https://community.intel.com/t5/Software-Archive/wrong-offload-wait-transfer-example-code/m-p/978618#M25558</guid>
      <dc:creator>Alin_M_Elena</dc:creator>
      <dc:date>2013-08-19T16:57:59Z</dc:date>
    </item>
    <item>
      <title>Word of advice: for up to</title>
      <link>https://community.intel.com/t5/Software-Archive/wrong-offload-wait-transfer-example-code/m-p/978619#M25559</link>
      <description>&lt;P&gt;Word of advice: for up to date examples, always look at the ones that come packaged with the compiler. The ones in the manual and even the Xeon Phi book by James Reinders are full of bugs / deprecated code.&lt;BR /&gt;
	&lt;BR /&gt;
	James&lt;/P&gt;</description>
      <pubDate>Tue, 20 Aug 2013 16:06:00 GMT</pubDate>
      <guid>https://community.intel.com/t5/Software-Archive/wrong-offload-wait-transfer-example-code/m-p/978619#M25559</guid>
      <dc:creator>james_B_8</dc:creator>
      <dc:date>2013-08-20T16:06:00Z</dc:date>
    </item>
    <item>
      <title>this is exactly from the very</title>
      <link>https://community.intel.com/t5/Software-Archive/wrong-offload-wait-transfer-example-code/m-p/978620#M25560</link>
      <description>&lt;P&gt;this is exactly from the very place you say... the link was just for reference as matched the very version of my compiler.&lt;/P&gt;
&lt;P&gt;A&lt;/P&gt;</description>
      <pubDate>Tue, 20 Aug 2013 16:12:01 GMT</pubDate>
      <guid>https://community.intel.com/t5/Software-Archive/wrong-offload-wait-transfer-example-code/m-p/978620#M25560</guid>
      <dc:creator>Alin_M_Elena</dc:creator>
      <dc:date>2013-08-20T16:12:01Z</dc:date>
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