<?xml version="1.0" encoding="UTF-8"?>
<rss xmlns:content="http://purl.org/rss/1.0/modules/content/" xmlns:dc="http://purl.org/dc/elements/1.1/" xmlns:rdf="http://www.w3.org/1999/02/22-rdf-syntax-ns#" xmlns:taxo="http://purl.org/rss/1.0/modules/taxonomy/" version="2.0">
  <channel>
    <title>topic AMD CPU??? in Software Archive</title>
    <link>https://community.intel.com/t5/Software-Archive/AMD-CPU/m-p/747578#M2618</link>
    <description>Correction :  Intel MKL  , not iml, sorry ...</description>
    <pubDate>Fri, 15 Jun 2012 15:40:02 GMT</pubDate>
    <dc:creator>Armando_Lazaro_Alami</dc:creator>
    <dc:date>2012-06-15T15:40:02Z</dc:date>
    <item>
      <title>AMD CPU???</title>
      <link>https://community.intel.com/t5/Software-Archive/AMD-CPU/m-p/747573#M2613</link>
      <description>If cpu is AMD,Can use Cilk Plus(or parallel studio)??</description>
      <pubDate>Mon, 04 Jun 2012 07:22:59 GMT</pubDate>
      <guid>https://community.intel.com/t5/Software-Archive/AMD-CPU/m-p/747573#M2613</guid>
      <dc:creator>kfest8303</dc:creator>
      <dc:date>2012-06-04T07:22:59Z</dc:date>
    </item>
    <item>
      <title>AMD CPU???</title>
      <link>https://community.intel.com/t5/Software-Archive/AMD-CPU/m-p/747574#M2614</link>
      <description>Presumably yes, if you are willing to use compatible architecture options, in case you may need to avoid run-time CPU identity checks. For example, if on Windows, /arch:SSE3 /Qimf-arch-consistency:true should cover CPUs of at least the last 5 years.</description>
      <pubDate>Tue, 05 Jun 2012 10:15:47 GMT</pubDate>
      <guid>https://community.intel.com/t5/Software-Archive/AMD-CPU/m-p/747574#M2614</guid>
      <dc:creator>TimP</dc:creator>
      <dc:date>2012-06-05T10:15:47Z</dc:date>
    </item>
    <item>
      <title>AMD CPU???</title>
      <link>https://community.intel.com/t5/Software-Archive/AMD-CPU/m-p/747575#M2615</link>
      <description>So the use of /Qimf-arch-consistency:true allows working on AMDs CPUs with SSE3 specialized code ?&lt;BR /&gt;&lt;BR /&gt;I did not know about that and was overwriting the value of &lt;B&gt;__intel_cpu_indicator&lt;/B&gt; after my own check of CPU capabilities. &lt;BR /&gt;</description>
      <pubDate>Wed, 13 Jun 2012 23:15:18 GMT</pubDate>
      <guid>https://community.intel.com/t5/Software-Archive/AMD-CPU/m-p/747575#M2615</guid>
      <dc:creator>Armando_Lazaro_Alami</dc:creator>
      <dc:date>2012-06-13T23:15:18Z</dc:date>
    </item>
    <item>
      <title>AMD CPU???</title>
      <link>https://community.intel.com/t5/Software-Archive/AMD-CPU/m-p/747576#M2616</link>
      <description>Yes, the arch-consistency option along with /arch: option should remove the role of intel_cpu_indicator as it affects numerical results.</description>
      <pubDate>Thu, 14 Jun 2012 01:24:46 GMT</pubDate>
      <guid>https://community.intel.com/t5/Software-Archive/AMD-CPU/m-p/747576#M2616</guid>
      <dc:creator>TimP</dc:creator>
      <dc:date>2012-06-14T01:24:46Z</dc:date>
    </item>
    <item>
      <title>AMD CPU???</title>
      <link>https://community.intel.com/t5/Software-Archive/AMD-CPU/m-p/747577#M2617</link>
      <description>Hi Tim. Let me broad the question. In the case of IML , IPP, etc, some other CPU brand check were made. If I usethe arch-consistency option, how does it matter to those libraries ? The libraries are going to search for a "GENUINE INTEL" or are they going to ovey the previous switch ? &lt;DIV&gt;Thanks !&lt;/DIV&gt;</description>
      <pubDate>Fri, 15 Jun 2012 15:37:51 GMT</pubDate>
      <guid>https://community.intel.com/t5/Software-Archive/AMD-CPU/m-p/747577#M2617</guid>
      <dc:creator>Armando_Lazaro_Alami</dc:creator>
      <dc:date>2012-06-15T15:37:51Z</dc:date>
    </item>
    <item>
      <title>AMD CPU???</title>
      <link>https://community.intel.com/t5/Software-Archive/AMD-CPU/m-p/747578#M2618</link>
      <description>Correction :  Intel MKL  , not iml, sorry ...</description>
      <pubDate>Fri, 15 Jun 2012 15:40:02 GMT</pubDate>
      <guid>https://community.intel.com/t5/Software-Archive/AMD-CPU/m-p/747578#M2618</guid>
      <dc:creator>Armando_Lazaro_Alami</dc:creator>
      <dc:date>2012-06-15T15:40:02Z</dc:date>
    </item>
    <item>
      <title>AMD CPU???</title>
      <link>https://community.intel.com/t5/Software-Archive/AMD-CPU/m-p/747579#M2619</link>
      <description>The options you set in the compilation don't affect the ipp or mkl performance libraries. Those will continue to identify the category of CPU at run time. Specific questions on that topic would be more appropriate to the associated forum sections. If CPU identification issues should lead to incorrect results, that would be a reportable bug. &lt;BR /&gt;I'm not so familiar with IPP. I believe MKL requires SSE2 capable CPU as a minimum (with SSE3 preferred for complex arithmetic), so those versions would be expected to be used on a non-Intel CPU. You might have to submit a feature request ticket to find out if that could change in the future.</description>
      <pubDate>Fri, 15 Jun 2012 16:21:25 GMT</pubDate>
      <guid>https://community.intel.com/t5/Software-Archive/AMD-CPU/m-p/747579#M2619</guid>
      <dc:creator>TimP</dc:creator>
      <dc:date>2012-06-15T16:21:25Z</dc:date>
    </item>
  </channel>
</rss>

