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    <title>topic Message Ordering from Kernel SCIF APIs in Software Archive</title>
    <link>https://community.intel.com/t5/Software-Archive/Message-Ordering-from-Kernel-SCIF-APIs/m-p/983689#M26641</link>
    <description>&lt;P&gt;We're working on Kernel Mode applications on MIC. It is not clear from the document whether SCIF send/recv&amp;nbsp;APIs guarantee message ordering; that is: Say .. On host side: two threads send messages via scif_send() in sequential order (controlled by lock)&lt;/P&gt;
&lt;P&gt;If the card side has only one recv thread, will scif_recv()&amp;nbsp;received the two messages in the order of&amp;nbsp;sends ?&amp;nbsp;Will the messages interleave ?&lt;/P&gt;
&lt;P&gt;Thanks,&lt;/P&gt;
&lt;P&gt;Wendy&amp;nbsp;&amp;nbsp;&lt;/P&gt;
&lt;P&gt;&amp;nbsp;&lt;/P&gt;
&lt;P&gt;&amp;nbsp;&lt;/P&gt;
&lt;P&gt;&amp;nbsp;&lt;/P&gt;</description>
    <pubDate>Thu, 28 Mar 2013 16:35:28 GMT</pubDate>
    <dc:creator>Wendy__C_</dc:creator>
    <dc:date>2013-03-28T16:35:28Z</dc:date>
    <item>
      <title>Message Ordering from Kernel SCIF APIs</title>
      <link>https://community.intel.com/t5/Software-Archive/Message-Ordering-from-Kernel-SCIF-APIs/m-p/983689#M26641</link>
      <description>&lt;P&gt;We're working on Kernel Mode applications on MIC. It is not clear from the document whether SCIF send/recv&amp;nbsp;APIs guarantee message ordering; that is: Say .. On host side: two threads send messages via scif_send() in sequential order (controlled by lock)&lt;/P&gt;
&lt;P&gt;If the card side has only one recv thread, will scif_recv()&amp;nbsp;received the two messages in the order of&amp;nbsp;sends ?&amp;nbsp;Will the messages interleave ?&lt;/P&gt;
&lt;P&gt;Thanks,&lt;/P&gt;
&lt;P&gt;Wendy&amp;nbsp;&amp;nbsp;&lt;/P&gt;
&lt;P&gt;&amp;nbsp;&lt;/P&gt;
&lt;P&gt;&amp;nbsp;&lt;/P&gt;
&lt;P&gt;&amp;nbsp;&lt;/P&gt;</description>
      <pubDate>Thu, 28 Mar 2013 16:35:28 GMT</pubDate>
      <guid>https://community.intel.com/t5/Software-Archive/Message-Ordering-from-Kernel-SCIF-APIs/m-p/983689#M26641</guid>
      <dc:creator>Wendy__C_</dc:creator>
      <dc:date>2013-03-28T16:35:28Z</dc:date>
    </item>
    <item>
      <title>Yes, scif_recv will receive</title>
      <link>https://community.intel.com/t5/Software-Archive/Message-Ordering-from-Kernel-SCIF-APIs/m-p/983690#M26642</link>
      <description>&lt;P&gt;Yes, scif_recv will receive the message in the order of send. Actually, if you set scif_send as blocked send, the thread will be blocked until the message is received by scif_recv, so your next scif_send would be executed only after your first send.&amp;nbsp;&lt;/P&gt;</description>
      <pubDate>Fri, 29 Mar 2013 01:08:51 GMT</pubDate>
      <guid>https://community.intel.com/t5/Software-Archive/Message-Ordering-from-Kernel-SCIF-APIs/m-p/983690#M26642</guid>
      <dc:creator>Wei_W_2</dc:creator>
      <dc:date>2013-03-29T01:08:51Z</dc:date>
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