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    <title>topic Re: Using a register to return from a procedure in Software Archive</title>
    <link>https://community.intel.com/t5/Software-Archive/Using-a-register-to-return-from-a-procedure/m-p/993924#M27995</link>
    <description>&lt;DIV&gt;&lt;/DIV&gt;
&lt;P align="left"&gt;&lt;FONT size="2"&gt;Our engineers responded as follows:&lt;/FONT&gt;&lt;/P&gt;
&lt;P align="left"&gt;&lt;FONT color="#006600" size="2"&gt;Placing the return address in a register instead of the stack is an excellent idea. This technique would definitely increase performance by reducing the number of memory references when jumping to and from procedures. In fact, the Itanium 2 processor employs exactly such a technique, with eight registers reserved for destination addresses.&lt;/FONT&gt;&lt;/P&gt;
&lt;P align="left"&gt;&lt;FONT color="#006600" size="2"&gt;For IA-32, this would be extremely difficult to implement because of the requirement to support legacy code. Previously written programs must still execute correctly on newer processors, so this approach would require completely new call and return instructions as well as reserving a register for storing the return address. Because registers in IA-32 are few in number, programmers can typically realize a greater performance improvement by using the available registers to hold data values instead of a return address. This allows them to save multiple memory accesses during the course of a procedure instead of just two for call and return.&lt;/FONT&gt;&lt;/P&gt;
&lt;P align="left"&gt;&lt;BR /&gt;&lt;FONT color="#006600" size="2"&gt;The Itanium 2 processor has 128 general purpose integer registers and has the luxury of being able to dedicate eight more registers to pointer addresses. The IA-32 processor architecture, however, with only 8 or 16 available registers, can realize better performance by keeping its registers as general purpose data stores.&lt;/FONT&gt;&lt;/P&gt;
&lt;P align="left"&gt;&lt;FONT size="2"&gt;==&lt;/FONT&gt;&lt;/P&gt;
&lt;P align="left"&gt;&lt;FONT size="2"&gt;Regards,&lt;/FONT&gt;&lt;/P&gt;&lt;FONT size="2"&gt;
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&lt;P align="left"&gt;&lt;/P&gt;&lt;/FONT&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Message Edited by intel.software.network.support on &lt;SPAN class="date_text"&gt;12-02-2005&lt;/SPAN&gt; &lt;SPAN class="time_text"&gt;01:10 PM&lt;/SPAN&gt;&lt;/P&gt;</description>
    <pubDate>Fri, 18 Mar 2005 06:32:32 GMT</pubDate>
    <dc:creator>Intel_Software_Netw1</dc:creator>
    <dc:date>2005-03-18T06:32:32Z</dc:date>
    <item>
      <title>Using a register to return from a procedure</title>
      <link>https://community.intel.com/t5/Software-Archive/Using-a-register-to-return-from-a-procedure/m-p/993922#M27993</link>
      <description>&lt;DIV&gt;&lt;/DIV&gt;
&lt;P&gt;With the increase in the number of registers, I was wondering if using a register to return from a procedure was a good idea to improve performance. Instead of using the call instruction to push the return address on the stack and call the procedure, the address is written in a register and the procedure is entered with a jump.&lt;/P&gt;
&lt;DIV style="BORDER-RIGHT: black 1px solid; PADDING-RIGHT: 10px; BORDER-TOP: black 1px solid; PADDING-LEFT: 10px; PADDING-BOTTOM: 10px; BORDER-LEFT: black 1px solid; PADDING-TOP: 10px; BORDER-BOTTOM: black 1px solid"&gt;&lt;SPAN class="text_smallest"&gt;Code:&lt;/SPAN&gt;&lt;PRE&gt;call Procedure

Procedure:
; code...
ret

replaced by

lea return_register, ReturnAdress
jmp Procedure
ReturnAdress:

Procedure:
; code...
jmp return_register
&lt;/PRE&gt;&lt;/DIV&gt;
&lt;P&gt;What do you think of this approach ?&lt;/P&gt;</description>
      <pubDate>Fri, 18 Mar 2005 03:58:58 GMT</pubDate>
      <guid>https://community.intel.com/t5/Software-Archive/Using-a-register-to-return-from-a-procedure/m-p/993922#M27993</guid>
      <dc:creator>manhattan95</dc:creator>
      <dc:date>2005-03-18T03:58:58Z</dc:date>
    </item>
    <item>
      <title>Re: Using a register to return from a procedure</title>
      <link>https://community.intel.com/t5/Software-Archive/Using-a-register-to-return-from-a-procedure/m-p/993923#M27994</link>
      <description>&lt;DIV&gt;&lt;/DIV&gt;
&lt;DIV align="left"&gt;&lt;FONT size="2"&gt;We are forwarding your question to our engineering contacts and will let you know how they respond.&lt;/FONT&gt;&lt;/DIV&gt;
&lt;DIV align="left"&gt;&lt;FONT size="2"&gt;&lt;/FONT&gt;&lt;/DIV&gt;
&lt;DIV align="left"&gt;&lt;FONT size="2"&gt;Regards,&lt;/FONT&gt;&lt;/DIV&gt;
&lt;DIV align="left"&gt;&lt;FONT size="2"&gt;&lt;/FONT&gt;&lt;/DIV&gt;
&lt;DIV align="left"&gt;&lt;FONT size="2"&gt;
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      <pubDate>Fri, 18 Mar 2005 04:29:37 GMT</pubDate>
      <guid>https://community.intel.com/t5/Software-Archive/Using-a-register-to-return-from-a-procedure/m-p/993923#M27994</guid>
      <dc:creator>Intel_Software_Netw1</dc:creator>
      <dc:date>2005-03-18T04:29:37Z</dc:date>
    </item>
    <item>
      <title>Re: Using a register to return from a procedure</title>
      <link>https://community.intel.com/t5/Software-Archive/Using-a-register-to-return-from-a-procedure/m-p/993924#M27995</link>
      <description>&lt;DIV&gt;&lt;/DIV&gt;
&lt;P align="left"&gt;&lt;FONT size="2"&gt;Our engineers responded as follows:&lt;/FONT&gt;&lt;/P&gt;
&lt;P align="left"&gt;&lt;FONT color="#006600" size="2"&gt;Placing the return address in a register instead of the stack is an excellent idea. This technique would definitely increase performance by reducing the number of memory references when jumping to and from procedures. In fact, the Itanium 2 processor employs exactly such a technique, with eight registers reserved for destination addresses.&lt;/FONT&gt;&lt;/P&gt;
&lt;P align="left"&gt;&lt;FONT color="#006600" size="2"&gt;For IA-32, this would be extremely difficult to implement because of the requirement to support legacy code. Previously written programs must still execute correctly on newer processors, so this approach would require completely new call and return instructions as well as reserving a register for storing the return address. Because registers in IA-32 are few in number, programmers can typically realize a greater performance improvement by using the available registers to hold data values instead of a return address. This allows them to save multiple memory accesses during the course of a procedure instead of just two for call and return.&lt;/FONT&gt;&lt;/P&gt;
&lt;P align="left"&gt;&lt;BR /&gt;&lt;FONT color="#006600" size="2"&gt;The Itanium 2 processor has 128 general purpose integer registers and has the luxury of being able to dedicate eight more registers to pointer addresses. The IA-32 processor architecture, however, with only 8 or 16 available registers, can realize better performance by keeping its registers as general purpose data stores.&lt;/FONT&gt;&lt;/P&gt;
&lt;P align="left"&gt;&lt;FONT size="2"&gt;==&lt;/FONT&gt;&lt;/P&gt;
&lt;P align="left"&gt;&lt;FONT size="2"&gt;Regards,&lt;/FONT&gt;&lt;/P&gt;&lt;FONT size="2"&gt;
&lt;P class="MsoNormal" style="MARGIN: 0in 0in 0pt"&gt;&lt;SPAN style="FONT-SIZE: 10pt; COLOR: black; FONT-FAMILY: Arial"&gt;Lexi S.&lt;/SPAN&gt;&lt;SPAN style="FONT-SIZE: 11pt; COLOR: black; FONT-FAMILY: Arial"&gt;&lt;NAMESPACE prefix="o" ns="urn:schemas-microsoft-com:office:office"&gt;&lt;P&gt;&lt;/P&gt;&lt;/NAMESPACE&gt;&lt;/SPAN&gt;&lt;/P&gt;
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&lt;P align="left"&gt;&lt;/P&gt;&lt;/FONT&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Message Edited by intel.software.network.support on &lt;SPAN class="date_text"&gt;12-02-2005&lt;/SPAN&gt; &lt;SPAN class="time_text"&gt;01:10 PM&lt;/SPAN&gt;&lt;/P&gt;</description>
      <pubDate>Fri, 18 Mar 2005 06:32:32 GMT</pubDate>
      <guid>https://community.intel.com/t5/Software-Archive/Using-a-register-to-return-from-a-procedure/m-p/993924#M27995</guid>
      <dc:creator>Intel_Software_Netw1</dc:creator>
      <dc:date>2005-03-18T06:32:32Z</dc:date>
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