<?xml version="1.0" encoding="UTF-8"?>
<rss xmlns:content="http://purl.org/rss/1.0/modules/content/" xmlns:dc="http://purl.org/dc/elements/1.1/" xmlns:rdf="http://www.w3.org/1999/02/22-rdf-syntax-ns#" xmlns:taxo="http://purl.org/rss/1.0/modules/taxonomy/" version="2.0">
  <channel>
    <title>topic Quote:Frances Roth (Intel) in Software Archive</title>
    <link>https://community.intel.com/t5/Software-Archive/error-quot-Opcode-unsupported-on-target-architecture-movaps-quot/m-p/999447#M29589</link>
    <description>&lt;P&gt;&lt;/P&gt;&lt;BLOCKQUOTE&gt;Frances Roth (Intel) wrote:&lt;BR /&gt;&lt;P&gt;&lt;/P&gt;

&lt;P&gt;That problem sounded familiar so I search in the User and Reference Guide for the Intel® C++ Compiler and found in the section "Use of C++ Classes for SIMD Operations on Intel® Many Integrated Core Architecture (Intel® MIC Architecture)":&lt;/P&gt;

&lt;P&gt;&lt;EM&gt;"You can enable these classes within native code or within offloaded code that is written to contain target-specific code typically protected by the __MIC__ macro."&lt;/EM&gt;&lt;/P&gt;

&lt;P&gt;You might want to do something like what it says in the section "Writing Target-Specific Code Using a Pragma" in the User and Reference Guide.&lt;/P&gt;

&lt;P&gt;You can find the software documentation at:&amp;nbsp;&lt;A href="https://software.intel.com/en-us/intel-software-technical-documentation"&gt;https://software.intel.com/en-us/intel-software-technical-documentation&lt;/A&gt;. The section "Writing Target-Specific Code Using a Pragma", in the 14.0 version of the manual is at&amp;nbsp;&lt;A href="https://software.intel.com/en-us/node/512551"&gt;https://software.intel.com/en-us/node/512551&lt;/A&gt;&lt;/P&gt;

&lt;P&gt;&amp;nbsp;&lt;/P&gt;

&lt;P&gt;&amp;nbsp;&lt;/P&gt;

&lt;P&gt;&lt;/P&gt;&lt;/BLOCKQUOTE&gt;&lt;P&gt;&lt;/P&gt;

&lt;P&gt;Thanks! You reply is very helpful! I rewrite the code in the AVX&amp;nbsp;immintrin form and add comment "ifdef &amp;nbsp;__MIC__" and it work well.In offload mode it need the annotation "__MIC__" to tell the compiler that the code will be run on the mic.&lt;/P&gt;

&lt;P&gt;&amp;nbsp;&lt;/P&gt;

&lt;P&gt;&amp;nbsp;&lt;/P&gt;</description>
    <pubDate>Wed, 16 Jul 2014 00:12:53 GMT</pubDate>
    <dc:creator>Vincent_L_</dc:creator>
    <dc:date>2014-07-16T00:12:53Z</dc:date>
    <item>
      <title>error:"Opcode unsupported on target architecture: movaps"</title>
      <link>https://community.intel.com/t5/Software-Archive/error-quot-Opcode-unsupported-on-target-architecture-movaps-quot/m-p/999445#M29587</link>
      <description>&lt;P&gt;Hi, I am a new developer for mic. Rencent I met a problem confused me a lot.&lt;/P&gt;

&lt;P&gt;the code like that:&lt;/P&gt;

&lt;PRE class="brush:cpp;"&gt;__declspec (aligned(128)) float farray[] = {0.0, 2.0, 4.0, 6.0, 8.0, 10.0, 12.0, 14.0};
F32vec16 vecConst;
vecConst = *(F32vec16*)&amp;amp;farray[0];&lt;/PRE&gt;

&lt;P&gt;first I compile in native mode like:&lt;/P&gt;

&lt;PRE class="brush:cpp;"&gt;icpc -mmic -openmp......&lt;/PRE&gt;

&lt;P&gt;it work well and run well in mic.&lt;/P&gt;

&lt;P&gt;but when I want to use a offload mode (the code is in a #pragma offload region) and I compile with:&lt;/P&gt;

&lt;PRE class="brush:cpp;"&gt;icpc -openmp ......&lt;/PRE&gt;

&lt;P&gt;it report compile error: "error #13393: *MIC* Opcode unsupported on target architecture: movaps" in the line "vecConst = *(SIMDType*)&amp;amp;farray[0];"&lt;/P&gt;

&lt;P&gt;I can not figure it out why?&lt;/P&gt;

&lt;P&gt;Thanks.&lt;/P&gt;</description>
      <pubDate>Mon, 14 Jul 2014 04:48:55 GMT</pubDate>
      <guid>https://community.intel.com/t5/Software-Archive/error-quot-Opcode-unsupported-on-target-architecture-movaps-quot/m-p/999445#M29587</guid>
      <dc:creator>Vincent_L_</dc:creator>
      <dc:date>2014-07-14T04:48:55Z</dc:date>
    </item>
    <item>
      <title>That problem sounded familiar</title>
      <link>https://community.intel.com/t5/Software-Archive/error-quot-Opcode-unsupported-on-target-architecture-movaps-quot/m-p/999446#M29588</link>
      <description>&lt;P&gt;That problem sounded familiar so I search in the User and Reference Guide for the Intel® C++ Compiler and found in the section "Use of C++ Classes for SIMD Operations on Intel® Many Integrated Core Architecture (Intel® MIC Architecture)":&lt;/P&gt;

&lt;P&gt;&lt;EM&gt;"You can enable these classes within native code or within offloaded code that is written to contain target-specific code typically protected by the __MIC__ macro."&lt;/EM&gt;&lt;/P&gt;

&lt;P&gt;You might want to do something like what it says in the section "Writing Target-Specific Code Using a Pragma" in the User and Reference Guide.&lt;/P&gt;

&lt;P&gt;You can find the software documentation at:&amp;nbsp;https://software.intel.com/en-us/intel-software-technical-documentation. The section "Writing Target-Specific Code Using a Pragma", in the 14.0 version of the manual is at&amp;nbsp;https://software.intel.com/en-us/node/512551&lt;/P&gt;

&lt;P&gt;&amp;nbsp;&lt;/P&gt;

&lt;P&gt;&amp;nbsp;&lt;/P&gt;</description>
      <pubDate>Tue, 15 Jul 2014 01:16:18 GMT</pubDate>
      <guid>https://community.intel.com/t5/Software-Archive/error-quot-Opcode-unsupported-on-target-architecture-movaps-quot/m-p/999446#M29588</guid>
      <dc:creator>Frances_R_Intel</dc:creator>
      <dc:date>2014-07-15T01:16:18Z</dc:date>
    </item>
    <item>
      <title>Quote:Frances Roth (Intel)</title>
      <link>https://community.intel.com/t5/Software-Archive/error-quot-Opcode-unsupported-on-target-architecture-movaps-quot/m-p/999447#M29589</link>
      <description>&lt;P&gt;&lt;/P&gt;&lt;BLOCKQUOTE&gt;Frances Roth (Intel) wrote:&lt;BR /&gt;&lt;P&gt;&lt;/P&gt;

&lt;P&gt;That problem sounded familiar so I search in the User and Reference Guide for the Intel® C++ Compiler and found in the section "Use of C++ Classes for SIMD Operations on Intel® Many Integrated Core Architecture (Intel® MIC Architecture)":&lt;/P&gt;

&lt;P&gt;&lt;EM&gt;"You can enable these classes within native code or within offloaded code that is written to contain target-specific code typically protected by the __MIC__ macro."&lt;/EM&gt;&lt;/P&gt;

&lt;P&gt;You might want to do something like what it says in the section "Writing Target-Specific Code Using a Pragma" in the User and Reference Guide.&lt;/P&gt;

&lt;P&gt;You can find the software documentation at:&amp;nbsp;&lt;A href="https://software.intel.com/en-us/intel-software-technical-documentation"&gt;https://software.intel.com/en-us/intel-software-technical-documentation&lt;/A&gt;. The section "Writing Target-Specific Code Using a Pragma", in the 14.0 version of the manual is at&amp;nbsp;&lt;A href="https://software.intel.com/en-us/node/512551"&gt;https://software.intel.com/en-us/node/512551&lt;/A&gt;&lt;/P&gt;

&lt;P&gt;&amp;nbsp;&lt;/P&gt;

&lt;P&gt;&amp;nbsp;&lt;/P&gt;

&lt;P&gt;&lt;/P&gt;&lt;/BLOCKQUOTE&gt;&lt;P&gt;&lt;/P&gt;

&lt;P&gt;Thanks! You reply is very helpful! I rewrite the code in the AVX&amp;nbsp;immintrin form and add comment "ifdef &amp;nbsp;__MIC__" and it work well.In offload mode it need the annotation "__MIC__" to tell the compiler that the code will be run on the mic.&lt;/P&gt;

&lt;P&gt;&amp;nbsp;&lt;/P&gt;

&lt;P&gt;&amp;nbsp;&lt;/P&gt;</description>
      <pubDate>Wed, 16 Jul 2014 00:12:53 GMT</pubDate>
      <guid>https://community.intel.com/t5/Software-Archive/error-quot-Opcode-unsupported-on-target-architecture-movaps-quot/m-p/999447#M29589</guid>
      <dc:creator>Vincent_L_</dc:creator>
      <dc:date>2014-07-16T00:12:53Z</dc:date>
    </item>
  </channel>
</rss>

