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    <title>topic The point of the packed store in Software Archive</title>
    <link>https://community.intel.com/t5/Software-Archive/packed-store-operation-for-vectorization-on-MIC/m-p/1045813#M47947</link>
    <description>&lt;P&gt;The point of the packed store is to get that loop to vectorize. Do you see another way to do this? Here is the full paragraph from the paper I am trying to decipher. Tim if this makes any sense to you, could you provide a pseudo code for me to look at?&lt;/P&gt;

&lt;P&gt;"For a SIMD register packed with rsq values, the result of a comparison with rcut is a W-bit mask, and a packed store writes a subset of indices to contiguous memory based up this mask. KCI includes a packed store instruction, which we can emulate in other SIMD instructions sets; both 128-bit, and 256-bit AVX, we achieve it with a mask loop up, a single shuffle, and a vector store. We determine the number of neighbors appended to the list by counting the number of bits in the comparison mask:&lt;/P&gt;</description>
    <pubDate>Thu, 11 Sep 2014 13:57:27 GMT</pubDate>
    <dc:creator>conor_p_</dc:creator>
    <dc:date>2014-09-11T13:57:27Z</dc:date>
    <item>
      <title>packed store operation for vectorization on MIC</title>
      <link>https://community.intel.com/t5/Software-Archive/packed-store-operation-for-vectorization-on-MIC/m-p/1045811#M47945</link>
      <description>&lt;P&gt;Hey everyone, I have a loop structure that looks like the following.&lt;/P&gt;

&lt;PRE class="brush:fortran;"&gt;do all atoms i 
     numneigh(i) = 0

     do all potential neighbors k do

          j = potential_neighbor(k)
          delx = x(j)-x(i); dely = y(j)-y(i); delz = z(j)-z(i)
          
         dr2 = delx**2 + dely**2 + delz**2

          if(dr2.lt.rcut)
                   numneigh(i) = numneigh(i)+1
                   neighbor(i)(numneigh(i)) = j
           endif
       end do
enddo&lt;/PRE&gt;

&lt;P&gt;Now I am reading a paper discussing how we can implement this code efficiently on a MIC. Clearly the above loop will not auto vectorize due to the loop dependence in lines 12 and 13. They mention that an efficient way to vectorize appending to slits in this manner is to use a packed store. They further mention: "For a SIMD register packed with req values, the result of a comparison with Rc+Rs is a W bit mask, and a packed store write a a subset of indices to contiguous memory based upon the mask." However as a Chemical Engineering PhD, I don't know really know whats going on here. I ran a decent google search, and the info was a little above my head. Could anyone explain this concept further to me. And if possible, modify the above code for me with this procedure so that I have an example to look at?&lt;/P&gt;</description>
      <pubDate>Thu, 11 Sep 2014 03:56:00 GMT</pubDate>
      <guid>https://community.intel.com/t5/Software-Archive/packed-store-operation-for-vectorization-on-MIC/m-p/1045811#M47945</guid>
      <dc:creator>conor_p_</dc:creator>
      <dc:date>2014-09-11T03:56:00Z</dc:date>
    </item>
    <item>
      <title>I don't see what it may have</title>
      <link>https://community.intel.com/t5/Software-Archive/packed-store-operation-for-vectorization-on-MIC/m-p/1045812#M47946</link>
      <description>&lt;P&gt;I don't see what it may have to do with your pseudo-code, but ifort for MIC can compile Fortran PACK into native pack instructions, giving about twice the performance of C++ in my test.&amp;nbsp; So, if PACK is appropriate for your usage, go ahead and use it.&lt;/P&gt;</description>
      <pubDate>Thu, 11 Sep 2014 11:12:57 GMT</pubDate>
      <guid>https://community.intel.com/t5/Software-Archive/packed-store-operation-for-vectorization-on-MIC/m-p/1045812#M47946</guid>
      <dc:creator>TimP</dc:creator>
      <dc:date>2014-09-11T11:12:57Z</dc:date>
    </item>
    <item>
      <title>The point of the packed store</title>
      <link>https://community.intel.com/t5/Software-Archive/packed-store-operation-for-vectorization-on-MIC/m-p/1045813#M47947</link>
      <description>&lt;P&gt;The point of the packed store is to get that loop to vectorize. Do you see another way to do this? Here is the full paragraph from the paper I am trying to decipher. Tim if this makes any sense to you, could you provide a pseudo code for me to look at?&lt;/P&gt;

&lt;P&gt;"For a SIMD register packed with rsq values, the result of a comparison with rcut is a W-bit mask, and a packed store writes a subset of indices to contiguous memory based up this mask. KCI includes a packed store instruction, which we can emulate in other SIMD instructions sets; both 128-bit, and 256-bit AVX, we achieve it with a mask loop up, a single shuffle, and a vector store. We determine the number of neighbors appended to the list by counting the number of bits in the comparison mask:&lt;/P&gt;</description>
      <pubDate>Thu, 11 Sep 2014 13:57:27 GMT</pubDate>
      <guid>https://community.intel.com/t5/Software-Archive/packed-store-operation-for-vectorization-on-MIC/m-p/1045813#M47947</guid>
      <dc:creator>conor_p_</dc:creator>
      <dc:date>2014-09-11T13:57:27Z</dc:date>
    </item>
    <item>
      <title>Conor,</title>
      <link>https://community.intel.com/t5/Software-Archive/packed-store-operation-for-vectorization-on-MIC/m-p/1045814#M47948</link>
      <description>&lt;P&gt;Conor,&lt;/P&gt;

&lt;P&gt;We missed your post.&lt;/P&gt;

&lt;P&gt;Do you still need an answer to your question?&lt;/P&gt;

&lt;P&gt;Regards&lt;BR /&gt;
	--&lt;BR /&gt;
	Taylor&lt;BR /&gt;
	&amp;nbsp;&lt;/P&gt;</description>
      <pubDate>Thu, 23 Oct 2014 17:28:18 GMT</pubDate>
      <guid>https://community.intel.com/t5/Software-Archive/packed-store-operation-for-vectorization-on-MIC/m-p/1045814#M47948</guid>
      <dc:creator>TaylorIoTKidd</dc:creator>
      <dc:date>2014-10-23T17:28:18Z</dc:date>
    </item>
    <item>
      <title>We may be running into the</title>
      <link>https://community.intel.com/t5/Software-Archive/packed-store-operation-for-vectorization-on-MIC/m-p/1045815#M47949</link>
      <description>&lt;P&gt;We may be running into the danger of how to optimize the inner most portion of a&lt;S&gt; bad &lt;/S&gt;inefficient algorithm. I do not think there is sufficient information to provide best guidance.&lt;/P&gt;

&lt;P&gt;Presumptuously this is an n-body situation. It is undefined as to what "all potential neighbors" is. How did potential_neighbor() get filled in? Does the (dr2.lt.rcut) specify the next iteration potential_neighbor()? If&amp;nbsp;this is an n-body problem&amp;nbsp;wouldn't it make sense to save dr2 for use in subsequent computation?&lt;/P&gt;

&lt;P&gt;These are just a few of the questions.&lt;/P&gt;

&lt;P&gt;Other questions could be are the atoms periodically relocated such that they are clustered together in order to improve vectorization and locality?&lt;/P&gt;

&lt;P&gt;Jim Dempsey&lt;/P&gt;

&lt;P&gt;&amp;nbsp;&lt;/P&gt;</description>
      <pubDate>Fri, 24 Oct 2014 11:44:00 GMT</pubDate>
      <guid>https://community.intel.com/t5/Software-Archive/packed-store-operation-for-vectorization-on-MIC/m-p/1045815#M47949</guid>
      <dc:creator>jimdempseyatthecove</dc:creator>
      <dc:date>2014-10-24T11:44:00Z</dc:date>
    </item>
    <item>
      <title>Yes, you are correct. This is</title>
      <link>https://community.intel.com/t5/Software-Archive/packed-store-operation-for-vectorization-on-MIC/m-p/1045816#M47950</link>
      <description>&lt;P&gt;Yes, you are correct. This is an n body simulation. I was trying to not bog you down in details, but it looks like I didn't provide enough information. There is a linked list type algorithm. potential_neighbor(i) would contain pointers to atoms that are within one of the 26 neighboring cells that atom i is in. I am looking for how to handle that conditional if statement, but If I need to provide the full code just let me know.&lt;/P&gt;</description>
      <pubDate>Mon, 27 Oct 2014 18:17:40 GMT</pubDate>
      <guid>https://community.intel.com/t5/Software-Archive/packed-store-operation-for-vectorization-on-MIC/m-p/1045816#M47950</guid>
      <dc:creator>conor_p_</dc:creator>
      <dc:date>2014-10-27T18:17:40Z</dc:date>
    </item>
    <item>
      <title>Conor,</title>
      <link>https://community.intel.com/t5/Software-Archive/packed-store-operation-for-vectorization-on-MIC/m-p/1045817#M47951</link>
      <description>&lt;P&gt;Conor,&lt;/P&gt;

&lt;P&gt;Is the paper authored by Intel? Please provide a reference to it.&lt;/P&gt;

&lt;P&gt;Regards&lt;BR /&gt;
	--&lt;BR /&gt;
	Taylor&lt;BR /&gt;
	&amp;nbsp;&lt;/P&gt;</description>
      <pubDate>Fri, 14 Nov 2014 21:15:32 GMT</pubDate>
      <guid>https://community.intel.com/t5/Software-Archive/packed-store-operation-for-vectorization-on-MIC/m-p/1045817#M47951</guid>
      <dc:creator>TaylorIoTKidd</dc:creator>
      <dc:date>2014-11-14T21:15:32Z</dc:date>
    </item>
    <item>
      <title>Details....</title>
      <link>https://community.intel.com/t5/Software-Archive/packed-store-operation-for-vectorization-on-MIC/m-p/1045818#M47952</link>
      <description>&lt;P&gt;Details....&lt;/P&gt;

&lt;P&gt;Are all the atoms within&amp;nbsp;each neighboring cell contained in each linked list?&lt;/P&gt;

&lt;P&gt;Am I correct to&amp;nbsp;assume that the purpose of the linked list(s) are to permit atoms to migrate from cell to cell?&lt;/P&gt;

&lt;P&gt;If so, then it might be more beneficial to move the entire atom (or high compute portion of the atom)&amp;nbsp;from cell to cell than to move the pointer. The moves only occur when an atom migrates a cell barrier. By doing this you may be enabling better vectorization. Note, you need not squish out the vacated atom positions, at least not at every instance of a cell migration. Just structure the vacated cells such that they produce null results (being careful to compute in a manner that avoids divide by zero), Note massless and/or chargeless atoms produce no force. Periodically you could squish out the null entries.&lt;/P&gt;

&lt;P&gt;Jim Dempsey&lt;/P&gt;</description>
      <pubDate>Sat, 15 Nov 2014 04:17:08 GMT</pubDate>
      <guid>https://community.intel.com/t5/Software-Archive/packed-store-operation-for-vectorization-on-MIC/m-p/1045818#M47952</guid>
      <dc:creator>jimdempseyatthecove</dc:creator>
      <dc:date>2014-11-15T04:17:08Z</dc:date>
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