https://community.intel.com/t5/Software-Archive/Flushing/m-p/791667#M5351 <P>What does the processor actually do when it invalidates the cache or tlb? What physically happens with a flush?</P> Wed, 23 Jun 2010 15:06:12 GMT heinerj 2010-06-23T15:06:12Z https://community.intel.com/t5/Software-Archive/Flushing/m-p/791667#M5351 <P>What does the processor actually do when it invalidates the cache or tlb? What physically happens with a flush?</P> Wed, 23 Jun 2010 15:06:12 GMT https://community.intel.com/t5/Software-Archive/Flushing/m-p/791667#M5351 heinerj 2010-06-23T15:06:12Z https://community.intel.com/t5/Software-Archive/Flushing/m-p/791668#M5352 <P>For general informationonhowmemoryhierarchies work, you might take a look atComputer Architecture: A Quantitative Approach by John L. Hennessy and David A. Patterson.This has come to be the standard university text for computer architecture.<BR /><BR />If your question is intended to be much more detailed in nature, you should take a look at Intel 64 and IA-32 Architectures Software Developer's Manuals at<BR /><BR /><A href="http://www.intel.com/products/processor/manuals/" target="_blank">http://www.intel.com/products/processor/manuals/</A><BR /><BR />In particular, take a look at section 4.10.4 of Volume 3B: System Programming Guide.<BR /><BR />David Ott</P> Thu, 24 Jun 2010 15:39:27 GMT https://community.intel.com/t5/Software-Archive/Flushing/m-p/791668#M5352 David_O_Intel1 2010-06-24T15:39:27Z