<?xml version="1.0" encoding="UTF-8"?>
<rss xmlns:content="http://purl.org/rss/1.0/modules/content/" xmlns:dc="http://purl.org/dc/elements/1.1/" xmlns:rdf="http://www.w3.org/1999/02/22-rdf-syntax-ns#" xmlns:taxo="http://purl.org/rss/1.0/modules/taxonomy/" version="2.0">
  <channel>
    <title>topic EPT: Strange VM-Exits in Software Archive</title>
    <link>https://community.intel.com/t5/Software-Archive/EPT-Strange-VM-Exits/m-p/815770#M5965</link>
    <description>&lt;P&gt;Hi,&lt;BR /&gt;&lt;BR /&gt;Here are some comments I received from a colleague:&lt;BR /&gt;&lt;BR /&gt;"The VM exit reports that the EPT violation was detected during the translation of guest-linear address 0x807ac6a8.&lt;/P&gt;&lt;P&gt;It would be good to confirm that the translation of this linear address (based on CR3 and paging mode) does indeed require reading a paging-structure entry whose guest-physical address is 0xb6206d60.&lt;/P&gt;&lt;P&gt;The VM exit reports that the EPT violation was detected during the delivery of interrupt D1H.&lt;/P&gt;&lt;P&gt;It would be good to confirm that the delivery of interrupt D1H (based on IDTR, SS.DPL, and SS:ESP) will require access to linear address 0x807ac6a8."&lt;BR /&gt;&lt;BR /&gt;Hope this helps.&lt;BR /&gt;&lt;BR /&gt;David Ott&lt;/P&gt;&lt;P&gt;&lt;/P&gt;</description>
    <pubDate>Sun, 16 Oct 2011 16:04:45 GMT</pubDate>
    <dc:creator>David_O_Intel1</dc:creator>
    <dc:date>2011-10-16T16:04:45Z</dc:date>
    <item>
      <title>EPT: Strange VM-Exits</title>
      <link>https://community.intel.com/t5/Software-Archive/EPT-Strange-VM-Exits/m-p/815769#M5964</link>
      <description>Hello,&lt;BR /&gt;&lt;BR /&gt;I am developing a simple VMM with interrupts disabled in the host. It uses EPT 1-to-1 mapping from guest physical to physical addresses.&lt;BR /&gt;And I am getting strange VM-Exits (accidentally).&lt;BR /&gt;----------------------------------------&lt;BR /&gt;VM Exit Reason: 0x30 (EPT Violation)&lt;BR /&gt;IDT Vectoring Information: 0x800000d1 (delivering hardware interrupt 0xd1)&lt;BR /&gt;Exit Qualification: 0x81 (reading guest paging structure; guest physical memory is not readable)&lt;BR /&gt;Guest Physical Address: 0xb6206d60&lt;BR /&gt;Guest Virtual Address: 0x807ac6a8&lt;BR /&gt;&lt;BR /&gt;EPT walk for gpa=0xb6206d60, EPTP=0xaadd001e:&lt;BR /&gt;PML4E: 0xaadd1007&lt;BR /&gt;PDPTE: 0xaadd4007&lt;BR /&gt;PDE: 0xa0c4f007&lt;BR /&gt;PTE: 0xb6206033 (physical address: 0xb6206000; readable, writable; memory type: writeback)&lt;BR /&gt;----------------------------------------&lt;BR /&gt;&lt;BR /&gt;Since there is nothing to fix in EPT, I leave it intact and copy data from IDT-Vectoring Information to VM-Entry Interruption-Information field.&lt;BR /&gt;&lt;BR /&gt;But then I get the same VM exits and VMM infinitely loops on them.&lt;BR /&gt;&lt;BR /&gt;So questions are:&lt;BR /&gt;- Is it possible (Exit Qualification says page is NOT readable but it IS according to EPT walk) or I am doing something wrong?&lt;BR /&gt;- Is IDT-Vectoring Information handled right way?&lt;BR /&gt;&lt;BR /&gt;Thanks in advance for any help!&lt;BR /&gt;&lt;BR /&gt;</description>
      <pubDate>Sun, 09 Oct 2011 19:30:16 GMT</pubDate>
      <guid>https://community.intel.com/t5/Software-Archive/EPT-Strange-VM-Exits/m-p/815769#M5964</guid>
      <dc:creator>hellfire</dc:creator>
      <dc:date>2011-10-09T19:30:16Z</dc:date>
    </item>
    <item>
      <title>EPT: Strange VM-Exits</title>
      <link>https://community.intel.com/t5/Software-Archive/EPT-Strange-VM-Exits/m-p/815770#M5965</link>
      <description>&lt;P&gt;Hi,&lt;BR /&gt;&lt;BR /&gt;Here are some comments I received from a colleague:&lt;BR /&gt;&lt;BR /&gt;"The VM exit reports that the EPT violation was detected during the translation of guest-linear address 0x807ac6a8.&lt;/P&gt;&lt;P&gt;It would be good to confirm that the translation of this linear address (based on CR3 and paging mode) does indeed require reading a paging-structure entry whose guest-physical address is 0xb6206d60.&lt;/P&gt;&lt;P&gt;The VM exit reports that the EPT violation was detected during the delivery of interrupt D1H.&lt;/P&gt;&lt;P&gt;It would be good to confirm that the delivery of interrupt D1H (based on IDTR, SS.DPL, and SS:ESP) will require access to linear address 0x807ac6a8."&lt;BR /&gt;&lt;BR /&gt;Hope this helps.&lt;BR /&gt;&lt;BR /&gt;David Ott&lt;/P&gt;&lt;P&gt;&lt;/P&gt;</description>
      <pubDate>Sun, 16 Oct 2011 16:04:45 GMT</pubDate>
      <guid>https://community.intel.com/t5/Software-Archive/EPT-Strange-VM-Exits/m-p/815770#M5965</guid>
      <dc:creator>David_O_Intel1</dc:creator>
      <dc:date>2011-10-16T16:04:45Z</dc:date>
    </item>
  </channel>
</rss>

