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    <title>topic To pass different options for in Software Archive</title>
    <link>https://community.intel.com/t5/Software-Archive/Using-a-different-floating-point-model-for-offload-section/m-p/1122942#M76840</link>
    <description>&lt;P&gt;To pass different options for Xeon Phi compilation use&lt;/P&gt;

&lt;P&gt;-&lt;STRONG&gt;qoffload-option,mic,compiler,”-fp-model fast –fimf-precision=high”&lt;/STRONG&gt;&lt;/P&gt;</description>
    <pubDate>Tue, 29 Mar 2016 16:08:31 GMT</pubDate>
    <dc:creator>Ravi_N_Intel</dc:creator>
    <dc:date>2016-03-29T16:08:31Z</dc:date>
    <item>
      <title>Using a different floating point model for offload section</title>
      <link>https://community.intel.com/t5/Software-Archive/Using-a-different-floating-point-model-for-offload-section/m-p/1122939#M76837</link>
      <description>&lt;P&gt;Hi,&lt;/P&gt;

&lt;P&gt;I am working on an application, where we can specify all the compiler flags, floating point models (eg -fp-model source etc.) etc, in the Macros file.&lt;/P&gt;

&lt;P&gt;In the code, I am offloading a certain section to the Xeon Phi. Is it possible to use a different floating point model for this computation on Xeon Phi?&lt;/P&gt;

&lt;P&gt;For example, say the Macros file has the flag &lt;STRONG&gt;-fp-model source&lt;/STRONG&gt;, and I want to use &lt;STRONG&gt;-fp-model fast=2 -fimf-precision=high&lt;/STRONG&gt; for the computation on Xeon Phi.&lt;/P&gt;

&lt;P&gt;&amp;nbsp;&lt;/P&gt;

&lt;P&gt;Thanks,&lt;/P&gt;

&lt;P&gt;Amlesh&lt;/P&gt;</description>
      <pubDate>Thu, 24 Mar 2016 19:39:08 GMT</pubDate>
      <guid>https://community.intel.com/t5/Software-Archive/Using-a-different-floating-point-model-for-offload-section/m-p/1122939#M76837</guid>
      <dc:creator>Amlesh_K_</dc:creator>
      <dc:date>2016-03-24T19:39:08Z</dc:date>
    </item>
    <item>
      <title>In most cases, you can choose</title>
      <link>https://community.intel.com/t5/Software-Archive/Using-a-different-floating-point-model-for-offload-section/m-p/1122940#M76838</link>
      <description>&lt;P&gt;In most cases, you can choose different values of those settings for each compilation.&amp;nbsp; It seems entirely normal to set -fp-model source for Xeon host and more aggressive settings for Xeon Phi.&lt;/P&gt;

&lt;P&gt;I prefer more specific groups of options than -fp-model fast=2, but if you recognize all the consequences, including the implied -complex-limited-range, this should be OK.&amp;nbsp; I have used -fp-model source -fno-prec-div -imf-domain-exclusion=common&lt;/P&gt;

&lt;P&gt;and now I might try -fp-model fast=1 -fprotect-parens -imf-domain-exclusion=....&lt;/P&gt;

&lt;P&gt;but I suspect -fprotect-parens may still prevent optimization of inner_product and the like.&lt;/P&gt;

&lt;P&gt;A few implications of -fp-model fast&amp;nbsp; (e.g. -ftz) apply only in a main program and you may want to check whether they have effect on MIC.&amp;nbsp; If you happened to send denormals over from host it might be bad to have excluded correct handling on MIC by -fp-model-fast=2 or -imf-domain-exclusion.&amp;nbsp; Note the warning against setting -fast-transcendentals (included in -fp-model fast) together with -fp-model strict.&lt;/P&gt;</description>
      <pubDate>Fri, 25 Mar 2016 16:47:27 GMT</pubDate>
      <guid>https://community.intel.com/t5/Software-Archive/Using-a-different-floating-point-model-for-offload-section/m-p/1122940#M76838</guid>
      <dc:creator>TimP</dc:creator>
      <dc:date>2016-03-25T16:47:27Z</dc:date>
    </item>
    <item>
      <title>Hi Tim,</title>
      <link>https://community.intel.com/t5/Software-Archive/Using-a-different-floating-point-model-for-offload-section/m-p/1122941#M76839</link>
      <description>&lt;P&gt;Hi Tim,&lt;/P&gt;

&lt;P&gt;&amp;nbsp;&lt;/P&gt;

&lt;P&gt;In the application I am working, we can check the error growth over timesteps. Using fp-model fast=2 if fine.&lt;/P&gt;

&lt;P&gt;&amp;nbsp;&lt;/P&gt;

&lt;P&gt;Can you please also suggest how do I set different floating model for the Xeon Phi execution?&lt;/P&gt;

&lt;P&gt;&amp;nbsp;&lt;/P&gt;

&lt;P&gt;Thanks,&lt;/P&gt;

&lt;P&gt;Amlesh&lt;/P&gt;</description>
      <pubDate>Fri, 25 Mar 2016 17:03:50 GMT</pubDate>
      <guid>https://community.intel.com/t5/Software-Archive/Using-a-different-floating-point-model-for-offload-section/m-p/1122941#M76839</guid>
      <dc:creator>Amlesh_K_</dc:creator>
      <dc:date>2016-03-25T17:03:50Z</dc:date>
    </item>
    <item>
      <title>To pass different options for</title>
      <link>https://community.intel.com/t5/Software-Archive/Using-a-different-floating-point-model-for-offload-section/m-p/1122942#M76840</link>
      <description>&lt;P&gt;To pass different options for Xeon Phi compilation use&lt;/P&gt;

&lt;P&gt;-&lt;STRONG&gt;qoffload-option,mic,compiler,”-fp-model fast –fimf-precision=high”&lt;/STRONG&gt;&lt;/P&gt;</description>
      <pubDate>Tue, 29 Mar 2016 16:08:31 GMT</pubDate>
      <guid>https://community.intel.com/t5/Software-Archive/Using-a-different-floating-point-model-for-offload-section/m-p/1122942#M76840</guid>
      <dc:creator>Ravi_N_Intel</dc:creator>
      <dc:date>2016-03-29T16:08:31Z</dc:date>
    </item>
    <item>
      <title>Thanks Ravi.</title>
      <link>https://community.intel.com/t5/Software-Archive/Using-a-different-floating-point-model-for-offload-section/m-p/1122943#M76841</link>
      <description>&lt;P&gt;Thanks Ravi.&lt;/P&gt;</description>
      <pubDate>Thu, 31 Mar 2016 05:56:41 GMT</pubDate>
      <guid>https://community.intel.com/t5/Software-Archive/Using-a-different-floating-point-model-for-offload-section/m-p/1122943#M76841</guid>
      <dc:creator>Amlesh_K_</dc:creator>
      <dc:date>2016-03-31T05:56:41Z</dc:date>
    </item>
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