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    <title>topic Hi in Software Archive</title>
    <link>https://community.intel.com/t5/Software-Archive/Intel-Xeon-Phi-Per-Core-Frequency/m-p/1173276#M79409</link>
    <description>&lt;P&gt;Hi&lt;BR /&gt;
	he seems that you have (powersave) that is equivalent (ondemand)&lt;BR /&gt;
	Maybe if revert to cpufreq, you will evaluate exactly if this change is more effective&lt;BR /&gt;
	with your hardware used for answer your expectations.&lt;BR /&gt;
	The difference is very variable with different model hardware tested.&lt;BR /&gt;
	Regards&lt;/P&gt;</description>
    <pubDate>Sat, 26 Aug 2017 01:57:01 GMT</pubDate>
    <dc:creator>aazue</dc:creator>
    <dc:date>2017-08-26T01:57:01Z</dc:date>
    <item>
      <title>Intel Xeon Phi Per Core Frequency</title>
      <link>https://community.intel.com/t5/Software-Archive/Intel-Xeon-Phi-Per-Core-Frequency/m-p/1173271#M79404</link>
      <description>&lt;P&gt;Hi All,&lt;/P&gt;

&lt;P&gt;I have following system:&lt;/P&gt;

&lt;UL style="color: rgb(96, 96, 96); font-size: 13.008px;"&gt;
	&lt;LI&gt;Operating System: CentOS Linux 7 (Core)&lt;/LI&gt;
	&lt;LI&gt;Kernel: Linux 3.10.0-514.10.2.el7.x86_64&lt;/LI&gt;
	&lt;LI&gt;Architecture: x86-64&amp;nbsp;Intel(R) Xeon Phi(TM) CPU 7210 @ 1.30GHz&lt;/LI&gt;
&lt;/UL&gt;

&lt;P&gt;Is the supported min and max frequency is 1GHz and 1.5GHz respectively?&lt;/P&gt;

&lt;P&gt;I also observed that it's possible to set frequency of each core individually. I validated this by setting frequency of few cores to 1GHz and rest to default. Does that mean Xeon Phi has per core frequency DVFS?&lt;/P&gt;

&lt;P&gt;Thanks.&lt;/P&gt;</description>
      <pubDate>Fri, 25 Aug 2017 01:34:23 GMT</pubDate>
      <guid>https://community.intel.com/t5/Software-Archive/Intel-Xeon-Phi-Per-Core-Frequency/m-p/1173271#M79404</guid>
      <dc:creator>CPati2</dc:creator>
      <dc:date>2017-08-25T01:34:23Z</dc:date>
    </item>
    <item>
      <title>The target frequency can be</title>
      <link>https://community.intel.com/t5/Software-Archive/Intel-Xeon-Phi-Per-Core-Frequency/m-p/1173272#M79405</link>
      <description>&lt;P&gt;The target frequency can be set on a per core basis, but I believe that you will find that all of the active cores always run at the same frequency.&lt;/P&gt;</description>
      <pubDate>Fri, 25 Aug 2017 20:14:36 GMT</pubDate>
      <guid>https://community.intel.com/t5/Software-Archive/Intel-Xeon-Phi-Per-Core-Frequency/m-p/1173272#M79405</guid>
      <dc:creator>McCalpinJohn</dc:creator>
      <dc:date>2017-08-25T20:14:36Z</dc:date>
    </item>
    <item>
      <title>Hi John,</title>
      <link>https://community.intel.com/t5/Software-Archive/Intel-Xeon-Phi-Per-Core-Frequency/m-p/1173273#M79406</link>
      <description>&lt;P&gt;Hi John,&lt;/P&gt;

&lt;P&gt;Does that mean, in terms of architecture there is unified frequency control for all cores, not &lt;STRONG&gt;per core&lt;/STRONG&gt;&amp;nbsp;&lt;SPAN style="color: rgb(84, 84, 84); font-family: Roboto, arial, sans-serif; font-size: small;"&gt;dynamic clock and voltage scaling (&lt;/SPAN&gt;&lt;SPAN style="font-weight: bold; color: rgb(106, 106, 106); font-family: Roboto, arial, sans-serif; font-size: small;"&gt;DCVS&lt;/SPAN&gt;&lt;SPAN style="color: rgb(84, 84, 84); font-family: Roboto, arial, sans-serif; font-size: small;"&gt;)?&lt;/SPAN&gt;&lt;/P&gt;

&lt;P&gt;One thing I have observed is that setting &lt;STRONG&gt;mix &lt;/STRONG&gt;and &lt;STRONG&gt;max &lt;/STRONG&gt;frequency doesn't seem to have any effect on the &lt;STRONG&gt;current &lt;/STRONG&gt;frequency. Below is the log of &lt;STRONG&gt;cpu0 &lt;/STRONG&gt;and it shows that current frequency is 1.2 GHz even though I set max and min to 1GHz. Any idea why this may be happening?&lt;/P&gt;

&lt;BLOCKQUOTE&gt;
	&lt;P&gt;ls /sys/devices/system/cpu/cpu0/cpufreq/&lt;/P&gt;

	&lt;P&gt;affected_cpus &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp;cpuinfo_transition_latency &amp;nbsp; scaling_governor&lt;BR /&gt;
		cpuinfo_cur_freq &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; related_cpus &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; scaling_max_freq&lt;BR /&gt;
		cpuinfo_max_freq &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; scaling_available_governors &amp;nbsp;scaling_min_freq&lt;BR /&gt;
		cpuinfo_min_freq &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; scaling_driver &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; scaling_setspeed&lt;/P&gt;

	&lt;P&gt;sudo cat /sys/devices/system/cpu/cpu0/cpufreq/*&lt;BR /&gt;
		0&lt;BR /&gt;
		1219257&lt;BR /&gt;
		1500000&lt;BR /&gt;
		1000000&lt;BR /&gt;
		4294967295&lt;BR /&gt;
		0&lt;BR /&gt;
		performance powersave&lt;BR /&gt;
		intel_pstate&lt;BR /&gt;
		performance&lt;BR /&gt;
		1000000&lt;BR /&gt;
		1000000&lt;/P&gt;
&lt;/BLOCKQUOTE&gt;

&lt;P&gt;&amp;nbsp;&lt;/P&gt;

&lt;P&gt;&lt;SPAN style="color: rgb(84, 84, 84); font-family: Roboto, arial, sans-serif; font-size: small;"&gt;Thanks.&lt;/SPAN&gt;&lt;/P&gt;</description>
      <pubDate>Fri, 25 Aug 2017 22:26:33 GMT</pubDate>
      <guid>https://community.intel.com/t5/Software-Archive/Intel-Xeon-Phi-Per-Core-Frequency/m-p/1173273#M79406</guid>
      <dc:creator>CPati2</dc:creator>
      <dc:date>2017-08-25T22:26:33Z</dc:date>
    </item>
    <item>
      <title>Hi</title>
      <link>https://community.intel.com/t5/Software-Archive/Intel-Xeon-Phi-Per-Core-Frequency/m-p/1173274#M79407</link>
      <description>&lt;P&gt;Hi&lt;BR /&gt;
	Probably you must use (on demand) instead (performance)&lt;BR /&gt;
	for dynamically frequency change&amp;nbsp; between (min) and (max) i don't use this hardware but&lt;BR /&gt;
	I think that it will be unable to him to work in his max frequency all the time&lt;BR /&gt;
	I don't know if management of dynamically range frequency of each cores are same on your&lt;BR /&gt;
	hardware,read subject information about the functionality of (governor)&lt;BR /&gt;
	if dynamically frequency is relative&amp;nbsp; with his temperature maybe, you can compile last&lt;BR /&gt;
	source (freeipmi-1.5.7)&amp;nbsp; for investigate more far.&lt;BR /&gt;
	Regards&lt;/P&gt;</description>
      <pubDate>Fri, 25 Aug 2017 23:33:41 GMT</pubDate>
      <guid>https://community.intel.com/t5/Software-Archive/Intel-Xeon-Phi-Per-Core-Frequency/m-p/1173274#M79407</guid>
      <dc:creator>aazue</dc:creator>
      <dc:date>2017-08-25T23:33:41Z</dc:date>
    </item>
    <item>
      <title>Hi,</title>
      <link>https://community.intel.com/t5/Software-Archive/Intel-Xeon-Phi-Per-Core-Frequency/m-p/1173275#M79408</link>
      <description>&lt;P&gt;Hi,&lt;/P&gt;

&lt;P&gt;The problem is that Xeon Phi doesn't have&amp;nbsp;&lt;STRONG&gt;ondemand&lt;/STRONG&gt;&amp;nbsp;because it uses &lt;STRONG&gt;intel-pstate&lt;/STRONG&gt; driver and not &lt;STRONG&gt;cpufreq. &lt;/STRONG&gt;I can revert to cpufreq, but I don't know the reason for default intel-pstate and whether it's architecture dependent for Xeon Phi.&lt;/P&gt;

&lt;P&gt;Refrence &lt;A href="https://www.phoronix.com/scan.php?page=news_item&amp;amp;px=P-State-Generic-Governors"&gt;this blog&lt;/A&gt; post.&lt;/P&gt;

&lt;P&gt;Thanks.&lt;/P&gt;</description>
      <pubDate>Fri, 25 Aug 2017 23:37:00 GMT</pubDate>
      <guid>https://community.intel.com/t5/Software-Archive/Intel-Xeon-Phi-Per-Core-Frequency/m-p/1173275#M79408</guid>
      <dc:creator>CPati2</dc:creator>
      <dc:date>2017-08-25T23:37:00Z</dc:date>
    </item>
    <item>
      <title>Hi</title>
      <link>https://community.intel.com/t5/Software-Archive/Intel-Xeon-Phi-Per-Core-Frequency/m-p/1173276#M79409</link>
      <description>&lt;P&gt;Hi&lt;BR /&gt;
	he seems that you have (powersave) that is equivalent (ondemand)&lt;BR /&gt;
	Maybe if revert to cpufreq, you will evaluate exactly if this change is more effective&lt;BR /&gt;
	with your hardware used for answer your expectations.&lt;BR /&gt;
	The difference is very variable with different model hardware tested.&lt;BR /&gt;
	Regards&lt;/P&gt;</description>
      <pubDate>Sat, 26 Aug 2017 01:57:01 GMT</pubDate>
      <guid>https://community.intel.com/t5/Software-Archive/Intel-Xeon-Phi-Per-Core-Frequency/m-p/1173276#M79409</guid>
      <dc:creator>aazue</dc:creator>
      <dc:date>2017-08-26T01:57:01Z</dc:date>
    </item>
    <item>
      <title>Hi,</title>
      <link>https://community.intel.com/t5/Software-Archive/Intel-Xeon-Phi-Per-Core-Frequency/m-p/1173277#M79410</link>
      <description>&lt;P&gt;Hi,&lt;/P&gt;

&lt;P&gt;I think what I am asking has nothing to do with which governor is in use. It's hardware and architecture based. So, whatever Intel desigend at the circuit level will not change by a software.&lt;/P&gt;

&lt;P&gt;Meaning, per core DVFS if supported has to be at the architecture level. I don't know why sysfs is giving ambiguous&amp;nbsp;data.&lt;/P&gt;

&lt;P&gt;Thanks.&lt;/P&gt;</description>
      <pubDate>Sat, 26 Aug 2017 19:20:29 GMT</pubDate>
      <guid>https://community.intel.com/t5/Software-Archive/Intel-Xeon-Phi-Per-Core-Frequency/m-p/1173277#M79410</guid>
      <dc:creator>CPati2</dc:creator>
      <dc:date>2017-08-26T19:20:29Z</dc:date>
    </item>
    <item>
      <title>Hi</title>
      <link>https://community.intel.com/t5/Software-Archive/Intel-Xeon-Phi-Per-Core-Frequency/m-p/1173278#M79411</link>
      <description>&lt;P&gt;Hi&lt;BR /&gt;
	I don't share your reasoning&amp;nbsp;&amp;nbsp; ,it's always the kernel and the system that have the&amp;nbsp; hand on all the&lt;BR /&gt;
	parameter and this management is above to all other elements ,if your request it's not propitious&lt;BR /&gt;
	for him, she will&amp;nbsp; be rejected.&lt;/P&gt;

&lt;P&gt;About your comment;&lt;BR /&gt;
	(So, whatever Intel designed at the circuit level will not change by a software.)&lt;BR /&gt;
	it's false, he can be&amp;nbsp; temporary disabled or modulated by the system,and fortunately than its the case.&lt;BR /&gt;
	Here , now since two years and half&amp;nbsp; we work for reduce consumption and improve performance of the system&lt;BR /&gt;
	I can confirm to you that taking account&amp;nbsp; only reference based technical characteristic of hardware is&lt;BR /&gt;
	great error, the system make as that he want or can&amp;nbsp; make only.&lt;BR /&gt;
	The system is not exclusively reserved in his conception&amp;nbsp; to the Intel Hardware specificity unique&lt;BR /&gt;
	&amp;nbsp;even if his quality is currently probably the better..&lt;BR /&gt;
	After several hundred approach tested that give no result really significant we understand&amp;nbsp; now&lt;BR /&gt;
	where to operate,currently We obtain now a very very well results that are exceptional.&lt;BR /&gt;
	This improve is effective with hardware INTEL,AMD,ARM and PPC.&lt;BR /&gt;
	Currently we search how to solve without required recompile all the system differently,,with all process&lt;BR /&gt;
	that are situated in his level tree , this task seem not easy to make simple to solve.&lt;BR /&gt;
	I have find a solution that could be an shortcut but i am not yet certain it's operate correct.&lt;/P&gt;

&lt;P&gt;About your second remarks:&lt;BR /&gt;
	If your order not answer correctly the problem is on side shared libraries where some process are locked.&lt;BR /&gt;
	You can test six dozen of models chipsets Intel different he will not change anything to this problem.&lt;BR /&gt;
	we referring to governor for evaluate approximately the part that are busy by the processors, but it's&lt;BR /&gt;
	not really an parameter very reliable.(more exactly ,how many time required for he decrease max to min)&lt;BR /&gt;
	I am not even certain that dynamic voltage scaling able to answer instantaneously or even change&lt;BR /&gt;
	progressively synchronized.&lt;/P&gt;

&lt;P&gt;Regards&lt;/P&gt;

&lt;P&gt;&amp;nbsp;&lt;/P&gt;</description>
      <pubDate>Sun, 27 Aug 2017 04:27:25 GMT</pubDate>
      <guid>https://community.intel.com/t5/Software-Archive/Intel-Xeon-Phi-Per-Core-Frequency/m-p/1173278#M79411</guid>
      <dc:creator>aazue</dc:creator>
      <dc:date>2017-08-27T04:27:25Z</dc:date>
    </item>
    <item>
      <title>Hi</title>
      <link>https://community.intel.com/t5/Software-Archive/Intel-Xeon-Phi-Per-Core-Frequency/m-p/1173279#M79412</link>
      <description>&lt;P&gt;Hi&lt;/P&gt;

&lt;P&gt;I have read speedily an part his source..&lt;BR /&gt;
	I think you don't query sufficient resources for he could change value to 1.5 by himself and&lt;BR /&gt;
	return to 1.3 after the hot point of your task ended.&lt;BR /&gt;
	It's not exactly as that you want but you see already if change of frequency (turbo)&amp;nbsp; works.&lt;BR /&gt;
	Even if&amp;nbsp; frequency is low your hardware extremely power (as the truck instead the car )&lt;/P&gt;

&lt;P&gt;About multi-cores (after having submit to&amp;nbsp; friends)&lt;BR /&gt;
	Even when you have standalone regulator each core the cost for driving each individually&lt;BR /&gt;
	would give result catastrophic. It's extremely complex, several problem exist .&lt;BR /&gt;
	Fortunately ,processors is only a part between the complete consumption of the hardware.&lt;/P&gt;

&lt;P&gt;Regards&lt;/P&gt;</description>
      <pubDate>Mon, 28 Aug 2017 23:01:09 GMT</pubDate>
      <guid>https://community.intel.com/t5/Software-Archive/Intel-Xeon-Phi-Per-Core-Frequency/m-p/1173279#M79412</guid>
      <dc:creator>aazue</dc:creator>
      <dc:date>2017-08-28T23:01:09Z</dc:date>
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