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    <title>topic Dear Adrian, in Software Archive</title>
    <link>https://community.intel.com/t5/Software-Archive/JTAG-Debugging-of-TNETC4830/m-p/956872#M80628</link>
    <description>&lt;P&gt;Dear Adrian,&lt;/P&gt;

&lt;P&gt;to my knowledge the TNETC4830 Puma 5 is a MIPS &amp;nbsp;based cable modem platform from Texas Instruments. Comparable Intel architecture based platforms include Intel(R) Atom(TM) Processor CE5300 or the Intel(R) Puma 6 Media Gateway. Both of these are supported with Intel(R) System Studio via Intel(R) ITP-XDP3 or Macraigor usb2Demon* JTAG debug devices.&lt;/P&gt;

&lt;P&gt;We currently only support Intel architecture and not MIPS* though.&lt;/P&gt;

&lt;P&gt;&amp;nbsp;&lt;/P&gt;

&lt;P&gt;Thanks, Rob&lt;/P&gt;</description>
    <pubDate>Fri, 21 Mar 2014 22:37:00 GMT</pubDate>
    <dc:creator>Rob_Mueller-Albrecht</dc:creator>
    <dc:date>2014-03-21T22:37:00Z</dc:date>
    <item>
      <title>JTAG Debugging of TNETC4830</title>
      <link>https://community.intel.com/t5/Software-Archive/JTAG-Debugging-of-TNETC4830/m-p/956871#M80627</link>
      <description>&lt;P&gt;which version of Intel System Studio support TNETC4830 Puma5 chipset? Any manuals, directions for JTAG Debugging of TNETC4830 Puma5? (JTAG debugger for Windows)&lt;/P&gt;</description>
      <pubDate>Fri, 21 Mar 2014 22:29:31 GMT</pubDate>
      <guid>https://community.intel.com/t5/Software-Archive/JTAG-Debugging-of-TNETC4830/m-p/956871#M80627</guid>
      <dc:creator>Adrian_R_</dc:creator>
      <dc:date>2014-03-21T22:29:31Z</dc:date>
    </item>
    <item>
      <title>Dear Adrian,</title>
      <link>https://community.intel.com/t5/Software-Archive/JTAG-Debugging-of-TNETC4830/m-p/956872#M80628</link>
      <description>&lt;P&gt;Dear Adrian,&lt;/P&gt;

&lt;P&gt;to my knowledge the TNETC4830 Puma 5 is a MIPS &amp;nbsp;based cable modem platform from Texas Instruments. Comparable Intel architecture based platforms include Intel(R) Atom(TM) Processor CE5300 or the Intel(R) Puma 6 Media Gateway. Both of these are supported with Intel(R) System Studio via Intel(R) ITP-XDP3 or Macraigor usb2Demon* JTAG debug devices.&lt;/P&gt;

&lt;P&gt;We currently only support Intel architecture and not MIPS* though.&lt;/P&gt;

&lt;P&gt;&amp;nbsp;&lt;/P&gt;

&lt;P&gt;Thanks, Rob&lt;/P&gt;</description>
      <pubDate>Fri, 21 Mar 2014 22:37:00 GMT</pubDate>
      <guid>https://community.intel.com/t5/Software-Archive/JTAG-Debugging-of-TNETC4830/m-p/956872#M80628</guid>
      <dc:creator>Rob_Mueller-Albrecht</dc:creator>
      <dc:date>2014-03-21T22:37:00Z</dc:date>
    </item>
    <item>
      <title>Hi Adrian,</title>
      <link>https://community.intel.com/t5/Software-Archive/JTAG-Debugging-of-TNETC4830/m-p/956873#M80629</link>
      <description>&lt;P&gt;Hi Adrian,&lt;/P&gt;

&lt;P&gt;thanks for pointing this out to me. I had actually not quite noticed that the MIPS based Puma 4 and Puma&amp;nbsp;5 chips are now owned, distributed and supported by Intel. Being focused on primarily IA this had escaped me - sorry.&lt;/P&gt;

&lt;P&gt;The main landing page for Intel's cable modem solutions is at &lt;A href="http://www.intel.com/go/cablemodem"&gt;www.intel.com/go/cablemodem&lt;/A&gt;.&lt;/P&gt;

&lt;P&gt;For software support of your Intel provided reference platform design, I would recommend to log into your IBL or Intel Premier Supprot account or contact your company's Intel field contact.&lt;/P&gt;

&lt;P&gt;If you don't have any of these contacts, please provide me with the exact platform you are basing your development on, and I will see if I can identify the right point of contact.&lt;/P&gt;

&lt;P&gt;Thanks, Rob&lt;/P&gt;

&lt;P&gt;&amp;nbsp;&lt;/P&gt;</description>
      <pubDate>Sat, 22 Mar 2014 15:53:00 GMT</pubDate>
      <guid>https://community.intel.com/t5/Software-Archive/JTAG-Debugging-of-TNETC4830/m-p/956873#M80629</guid>
      <dc:creator>Rob_Mueller-Albrecht</dc:creator>
      <dc:date>2014-03-22T15:53:00Z</dc:date>
    </item>
    <item>
      <title>Hi Adrian,</title>
      <link>https://community.intel.com/t5/Software-Archive/JTAG-Debugging-of-TNETC4830/m-p/956874#M80630</link>
      <description>&lt;P&gt;Hi Adrian,&lt;/P&gt;

&lt;P&gt;Puma5 being a very specialized platform not based on IA, informatio about the proposed JTAG debug solution is probably posted on our Intel Business Link portal. Where you succesful in talking with your Intel field contact or the distributor for your Puma5 platform?&lt;/P&gt;

&lt;P&gt;This would really be the best source of information on these older non-IA platforms. As I am&amp;nbsp;sure you can imagine JTAG debug on MIPS is quite different from JTAG debug on IA. I do not know which specific JTAG vendors have been enabled for Puma5.&lt;/P&gt;

&lt;P&gt;Thanks, Rob&lt;/P&gt;</description>
      <pubDate>Fri, 28 Mar 2014 22:22:18 GMT</pubDate>
      <guid>https://community.intel.com/t5/Software-Archive/JTAG-Debugging-of-TNETC4830/m-p/956874#M80630</guid>
      <dc:creator>Rob_Mueller-Albrecht</dc:creator>
      <dc:date>2014-03-28T22:22:18Z</dc:date>
    </item>
    <item>
      <title>Hi Adrian,</title>
      <link>https://community.intel.com/t5/Software-Archive/JTAG-Debugging-of-TNETC4830/m-p/956875#M80631</link>
      <description>&lt;P&gt;Hi Adrian,&lt;/P&gt;

&lt;P&gt;I sent an email to some contacts I have in the business unit that owns Puma5. I hope to get a recommendation for a JTAG debug tool back from them.&lt;/P&gt;

&lt;P&gt;I would still like to emphasize that your distributor or Intel field representative is probably the best source of this information.&lt;/P&gt;

&lt;P&gt;Thanks, Rob&lt;/P&gt;</description>
      <pubDate>Sun, 30 Mar 2014 16:18:12 GMT</pubDate>
      <guid>https://community.intel.com/t5/Software-Archive/JTAG-Debugging-of-TNETC4830/m-p/956875#M80631</guid>
      <dc:creator>Rob_Mueller-Albrecht</dc:creator>
      <dc:date>2014-03-30T16:18:12Z</dc:date>
    </item>
    <item>
      <title>Thank you, Rob.
 </title>
      <link>https://community.intel.com/t5/Software-Archive/JTAG-Debugging-of-TNETC4830/m-p/956876#M80632</link>
      <description>&lt;P&gt;TNETC4830 Puma 5 is ARM1176JZ core - ARMv6 Big Endian. Can be programmed with Segger &lt;A href="http://www.segger.com/jlink-general-info.html" rel="nofollow"&gt;J-Link&lt;/A&gt; debug probe.&lt;/P&gt;

&lt;P&gt;&amp;nbsp;&lt;/P&gt;</description>
      <pubDate>Sun, 30 Mar 2014 23:22:00 GMT</pubDate>
      <guid>https://community.intel.com/t5/Software-Archive/JTAG-Debugging-of-TNETC4830/m-p/956876#M80632</guid>
      <dc:creator>Adrian_R_</dc:creator>
      <dc:date>2014-03-30T23:22:00Z</dc:date>
    </item>
    <item>
      <title>which JTAG cable and software</title>
      <link>https://community.intel.com/t5/Software-Archive/JTAG-Debugging-of-TNETC4830/m-p/956877#M80633</link>
      <description>&lt;P&gt;which JTAG cable and software available for TNETC4830?&lt;/P&gt;</description>
      <pubDate>Mon, 28 Apr 2014 10:00:59 GMT</pubDate>
      <guid>https://community.intel.com/t5/Software-Archive/JTAG-Debugging-of-TNETC4830/m-p/956877#M80633</guid>
      <dc:creator>David_A_</dc:creator>
      <dc:date>2014-04-28T10:00:59Z</dc:date>
    </item>
    <item>
      <title>Hi David,</title>
      <link>https://community.intel.com/t5/Software-Archive/JTAG-Debugging-of-TNETC4830/m-p/956878#M80634</link>
      <description>&lt;P&gt;Hi David,&lt;/P&gt;

&lt;P&gt;I am pinging our owning division on recommended software tools for these older Puma platforms again.&lt;/P&gt;

&lt;P&gt;If you have not doen so yet, please als ocheck with your Intel field representative.&lt;/P&gt;

&lt;P&gt;Thanks Rob&lt;/P&gt;

&lt;P&gt;&amp;nbsp;&lt;/P&gt;

&lt;P&gt;&amp;nbsp;&lt;/P&gt;</description>
      <pubDate>Mon, 28 Apr 2014 14:42:16 GMT</pubDate>
      <guid>https://community.intel.com/t5/Software-Archive/JTAG-Debugging-of-TNETC4830/m-p/956878#M80634</guid>
      <dc:creator>Rob_Mueller-Albrecht</dc:creator>
      <dc:date>2014-04-28T14:42:16Z</dc:date>
    </item>
    <item>
      <title>Dear David,</title>
      <link>https://community.intel.com/t5/Software-Archive/JTAG-Debugging-of-TNETC4830/m-p/956879#M80635</link>
      <description>&lt;P&gt;Dear David,&lt;/P&gt;

&lt;P&gt;our application engineers tell me that for Puma4, they mostly use EST* VisionProbe* debug tools and that for Piuma5 they mostly use Trace32* from Lauterbach*.&lt;/P&gt;

&lt;P&gt;Your Intel field representative (Field Application Engineer or&amp;nbsp;Field Sales Engineer) should be able to provide you additional guidance.&lt;/P&gt;

&lt;P&gt;Thanks, Rob&amp;nbsp;&lt;/P&gt;

&lt;P&gt;&amp;nbsp;&lt;/P&gt;</description>
      <pubDate>Tue, 29 Apr 2014 19:49:33 GMT</pubDate>
      <guid>https://community.intel.com/t5/Software-Archive/JTAG-Debugging-of-TNETC4830/m-p/956879#M80635</guid>
      <dc:creator>Rob_Mueller-Albrecht</dc:creator>
      <dc:date>2014-04-29T19:49:33Z</dc:date>
    </item>
    <item>
      <title>Hello Rob,</title>
      <link>https://community.intel.com/t5/Software-Archive/JTAG-Debugging-of-TNETC4830/m-p/956880#M80636</link>
      <description>&lt;P&gt;Hi,&lt;/P&gt;

&lt;P&gt;TNETC4830 Puma 5 is ARM1176JZ core - ARMv6 Big Endian. Can be programmed with Segger &lt;A href="http://www.segger.com/jlink-general-info.html"&gt;J-Link&lt;/A&gt; debug probe.&lt;/P&gt;

&lt;P&gt;&amp;nbsp;&lt;/P&gt;

&lt;P&gt;&amp;nbsp;&lt;/P&gt;

&lt;P&gt;&amp;nbsp;&lt;/P&gt;</description>
      <pubDate>Sun, 15 Jun 2014 13:44:00 GMT</pubDate>
      <guid>https://community.intel.com/t5/Software-Archive/JTAG-Debugging-of-TNETC4830/m-p/956880#M80636</guid>
      <dc:creator>Adrian_R_</dc:creator>
      <dc:date>2014-06-15T13:44:00Z</dc:date>
    </item>
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