<?xml version="1.0" encoding="UTF-8"?>
<rss xmlns:content="http://purl.org/rss/1.0/modules/content/" xmlns:dc="http://purl.org/dc/elements/1.1/" xmlns:rdf="http://www.w3.org/1999/02/22-rdf-syntax-ns#" xmlns:taxo="http://purl.org/rss/1.0/modules/taxonomy/" version="2.0">
  <channel>
    <title>topic VS2010 installation problem in Software Archive</title>
    <link>https://community.intel.com/t5/Software-Archive/VS2010-installation-problem/m-p/742261#M902</link>
    <description>While gcc-compatibility in this respect has recognized value, I'm not certain it is implemented in past Windows compilers, where you may need the equivalent declspec. CEAN array notation should be recognized in any ICL 12.x version, so you should check that you have switched in ICL in place of CL.&lt;BR /&gt;</description>
    <pubDate>Mon, 23 Jul 2012 17:05:49 GMT</pubDate>
    <dc:creator>TimP</dc:creator>
    <dc:date>2012-07-23T17:05:49Z</dc:date>
    <item>
      <title>VS2010 installation problem</title>
      <link>https://community.intel.com/t5/Software-Archive/VS2010-installation-problem/m-p/742259#M900</link>
      <description>&lt;P&gt;Hello,I have recently installed VS2010 and Intel Parallel Studio XE. I have been trying to use the ArrayNotation example from the Intel website.I am unable to resolve the following error: "ERROR: identifier __assume_aligned is undefined"I'm sure there is something basic I need to due, but I have been unable to sort it out.Additionally, the array notation in the code is showing up as red underline as if it isn't recognized syntax - How can I resolve this.Any help would be greatly apprciated, I have been pulling my hair out.Regards,Brad&lt;/P&gt;</description>
      <pubDate>Mon, 23 Jul 2012 16:00:46 GMT</pubDate>
      <guid>https://community.intel.com/t5/Software-Archive/VS2010-installation-problem/m-p/742259#M900</guid>
      <dc:creator>bkimbrough</dc:creator>
      <dc:date>2012-07-23T16:00:46Z</dc:date>
    </item>
    <item>
      <title>VS2010 installation problem</title>
      <link>https://community.intel.com/t5/Software-Archive/VS2010-installation-problem/m-p/742260#M901</link>
      <description>Hello Brad,&lt;BR /&gt;&lt;BR /&gt;did you switch the solution to Intel C++ Compiler?&lt;BR /&gt;&lt;BR /&gt;&lt;span class="lia-inline-image-display-wrapper"&gt;&lt;img src="https://community.intel.com/skins/images/7B13F55A7CE623EF42E69096FA81A3A1/2021_redesign/images/image_not_found.png" /&gt;&lt;/span&gt;&lt;BR /&gt;Especially the "&lt;I&gt;__assume_aligned(&lt;VAR&gt;a&lt;/VAR&gt;,&lt;VAR&gt;n&lt;/VAR&gt;)&lt;/I&gt;" directive is built-in and won't require any more action, besides selecting "Use Intel C++".&lt;BR /&gt;&lt;BR /&gt;Regards,&lt;BR /&gt;&lt;BR /&gt;Georg Zitzlsberger</description>
      <pubDate>Mon, 23 Jul 2012 16:17:18 GMT</pubDate>
      <guid>https://community.intel.com/t5/Software-Archive/VS2010-installation-problem/m-p/742260#M901</guid>
      <dc:creator>Georg_Z_Intel</dc:creator>
      <dc:date>2012-07-23T16:17:18Z</dc:date>
    </item>
    <item>
      <title>VS2010 installation problem</title>
      <link>https://community.intel.com/t5/Software-Archive/VS2010-installation-problem/m-p/742261#M902</link>
      <description>While gcc-compatibility in this respect has recognized value, I'm not certain it is implemented in past Windows compilers, where you may need the equivalent declspec. CEAN array notation should be recognized in any ICL 12.x version, so you should check that you have switched in ICL in place of CL.&lt;BR /&gt;</description>
      <pubDate>Mon, 23 Jul 2012 17:05:49 GMT</pubDate>
      <guid>https://community.intel.com/t5/Software-Archive/VS2010-installation-problem/m-p/742261#M902</guid>
      <dc:creator>TimP</dc:creator>
      <dc:date>2012-07-23T17:05:49Z</dc:date>
    </item>
    <item>
      <title>VS2010 installation problem</title>
      <link>https://community.intel.com/t5/Software-Archive/VS2010-installation-problem/m-p/742262#M903</link>
      <description>Hello Tim,&lt;BR /&gt;&lt;BR /&gt;it is supported and semantically different to the &lt;I&gt;__declspec(align(...))&lt;/I&gt; variants, see documentation:&lt;BR /&gt;&lt;BR /&gt;&lt;TABLE frame="border" rules="all" border="1" cellpadding="4" cellspacing="0"&gt;&lt;THEAD align="left"&gt;&lt;TR&gt;&lt;TH class="cellrowborder" id="d61182e129" valign="top" width="53.703703703703695%"&gt;&lt;P&gt;Feature&lt;/P&gt;
&lt;/TH&gt;

  &lt;TH class="cellrowborder" id="d61182e133" valign="top" width="46.29629629629629%"&gt;&lt;P&gt;Description&lt;/P&gt;
&lt;/TH&gt;

&lt;/TR&gt;

&lt;/THEAD&gt;


&lt;TBODY&gt;
&lt;TR&gt;
  &lt;TD class="cellrowborder" headers="d61182e129 " valign="top" width="53.703703703703695%"&gt;&lt;P&gt;&lt;SAMP class="codeph"&gt;__declspec(align(&lt;VAR&gt;n&lt;/VAR&gt;))&lt;/SAMP&gt;&lt;/P&gt;
&lt;/TD&gt;

  &lt;TD class="cellrowborder" headers="d61182e133 " valign="top" width="46.29629629629629%"&gt;&lt;P&gt;Directs the compiler to align the variable to an &lt;VAR&gt;n&lt;/VAR&gt;-byte  boundary. Address of the variable is &lt;SAMP class="codeph"&gt;&lt;VAR&gt;address&lt;/VAR&gt; mod n=0&lt;/SAMP&gt;.&lt;/P&gt;
&lt;/TD&gt;

&lt;/TR&gt;


&lt;TR&gt;
  &lt;TD class="cellrowborder" headers="d61182e129 " valign="top" width="53.703703703703695%"&gt;&lt;P&gt;&lt;SAMP class="codeph"&gt;__declspec(align(&lt;VAR&gt;n&lt;/VAR&gt;,off))&lt;/SAMP&gt;&lt;/P&gt;
&lt;/TD&gt;

  &lt;TD class="cellrowborder" headers="d61182e133 " valign="top" width="46.29629629629629%"&gt;&lt;P&gt;Directs the compiler to align the variable to an &lt;VAR&gt;n&lt;/VAR&gt;-byte boundary with offset off within each &lt;VAR&gt;n&lt;/VAR&gt;-byte boundary. Address of the variable is &lt;SAMP class="codeph"&gt;&lt;VAR&gt;address&lt;/VAR&gt; mod n=off&lt;/SAMP&gt;.&lt;/P&gt;
&lt;/TD&gt;

&lt;/TR&gt;

&lt;TR&gt;
&lt;TD class="cellrowborder" headers="d61182e129 " valign="top" width="53.703703703703695%"&gt;&lt;/TD&gt;

&lt;TD class="cellrowborder" headers="d61182e133 " valign="top" width="46.29629629629629%"&gt;&lt;/TD&gt;

&lt;/TR&gt;

&lt;TR&gt;
&lt;TD class="cellrowborder" headers="d61182e129 " valign="top" width="53.703703703703695%"&gt;&lt;/TD&gt;

&lt;TD class="cellrowborder" headers="d61182e133 " valign="top" width="46.29629629629629%"&gt;&lt;/TD&gt;

&lt;/TR&gt;








&lt;TR&gt;
  &lt;TD class="cellrowborder" headers="d61182e129 " valign="top" width="53.703703703703695%"&gt;&lt;/TD&gt;

  &lt;TD class="cellrowborder" headers="d61182e133 " valign="top" width="46.29629629629629%"&gt;&lt;/TD&gt;

&lt;/TR&gt;


&lt;TR&gt;
  &lt;TD class="cellrowborder" headers="d61182e129 " valign="top" width="53.703703703703695%"&gt;&lt;P&gt;&lt;SAMP class="codeph"&gt;__assume_aligned(&lt;VAR&gt;a&lt;/VAR&gt;,&lt;VAR&gt;n&lt;/VAR&gt;)&lt;/SAMP&gt;&lt;/P&gt;
&lt;/TD&gt;

  &lt;TD class="cellrowborder" headers="d61182e133 " valign="top" width="46.29629629629629%"&gt;&lt;P&gt;Instructs the compiler to assume that array &lt;VAR&gt;a&lt;/VAR&gt; is aligned on an &lt;VAR&gt;n&lt;/VAR&gt;-byte boundary; used in cases where the compiler has failed to obtain alignment information.&lt;/P&gt;&lt;/TD&gt;&lt;/TR&gt;&lt;/TBODY&gt;&lt;/TABLE&gt;&lt;BR /&gt;&lt;BR /&gt;Best regards,&lt;BR /&gt;&lt;BR /&gt;Georg Zitzlsberger</description>
      <pubDate>Mon, 23 Jul 2012 17:14:10 GMT</pubDate>
      <guid>https://community.intel.com/t5/Software-Archive/VS2010-installation-problem/m-p/742262#M903</guid>
      <dc:creator>Georg_Z_Intel</dc:creator>
      <dc:date>2012-07-23T17:14:10Z</dc:date>
    </item>
    <item>
      <title>VS2010 installation problem</title>
      <link>https://community.intel.com/t5/Software-Archive/VS2010-installation-problem/m-p/742263#M904</link>
      <description>Hello Georg,&lt;DIV&gt;&lt;/DIV&gt;&lt;DIV&gt;Thank you for your suggestion.&lt;/DIV&gt;&lt;DIV&gt;&lt;/DIV&gt;&lt;DIV&gt;I verified that I have been using the Intel C++ compiler. I can build the project without errors. However, it doesn't appear to be running any faster than the serial implementation. I noticed your __assume_aligned is also underlined red.  Any ideas on how to fix this.&lt;/DIV&gt;&lt;DIV&gt;&lt;/DIV&gt;&lt;DIV&gt;Regards,&lt;/DIV&gt;&lt;DIV&gt;&lt;/DIV&gt;&lt;DIV&gt;Brad Kimbrough&lt;/DIV&gt;&lt;DIV&gt;&lt;/DIV&gt;&lt;DIV&gt;&lt;/DIV&gt;&lt;DIV&gt;&lt;/DIV&gt;</description>
      <pubDate>Mon, 23 Jul 2012 18:00:27 GMT</pubDate>
      <guid>https://community.intel.com/t5/Software-Archive/VS2010-installation-problem/m-p/742263#M904</guid>
      <dc:creator>bkimbrough</dc:creator>
      <dc:date>2012-07-23T18:00:27Z</dc:date>
    </item>
    <item>
      <title>VS2010 installation problem</title>
      <link>https://community.intel.com/t5/Software-Archive/VS2010-installation-problem/m-p/742264#M905</link>
      <description>Hello,&lt;DIV&gt;&lt;/DIV&gt;&lt;DIV&gt;I can build the ArrayNotation example, and it will run without error. However, It is not vectorizing one of the loops as outlined in the example documentation.&lt;/DIV&gt;&lt;DIV&gt;&lt;/DIV&gt;&lt;DIV&gt;Here is my code:&lt;/DIV&gt;&lt;DIV&gt;&lt;/DIV&gt;&lt;DIV&gt;&lt;DIV id="_mcePaste"&gt;&lt;DIV id="_mcePaste"&gt;&lt;DIV id="_mcePaste"&gt;#include &lt;STDIO.H&gt;&lt;/STDIO.H&gt;&lt;/DIV&gt;&lt;DIV id="_mcePaste"&gt;#include &lt;MATH.H&gt;&lt;/MATH.H&gt;&lt;/DIV&gt;&lt;DIV id="_mcePaste"&gt;#include &lt;TIME.H&gt;&lt;/TIME.H&gt;&lt;/DIV&gt;&lt;DIV id="_mcePaste"&gt;&lt;/DIV&gt;&lt;/DIV&gt;&lt;DIV id="_mcePaste"&gt;&lt;/DIV&gt;&lt;DIV id="_mcePaste"&gt;#define S 1024&lt;/DIV&gt;&lt;DIV id="_mcePaste"&gt;#define TCOUNT 16&lt;/DIV&gt;&lt;DIV id="_mcePaste"&gt;&lt;/DIV&gt;&lt;DIV id="_mcePaste"&gt;// Use 16-byte alignment for a CPU with 128-bit vector registers. For the CPUs with Intel AVX support&lt;/DIV&gt;&lt;DIV id="_mcePaste"&gt;// use 32-byte alignment, and use 64-byte alignment for Intel MIC architecture.&lt;/DIV&gt;&lt;DIV id="_mcePaste"&gt;#define ALIGNMENT 16&lt;/DIV&gt;&lt;DIV id="_mcePaste"&gt;&lt;/DIV&gt;&lt;DIV id="_mcePaste"&gt;&lt;DIV id="_mcePaste"&gt;#define S 1024&lt;/DIV&gt;&lt;DIV id="_mcePaste"&gt;#define ITERS 1024*1024*10&lt;/DIV&gt;&lt;DIV id="_mcePaste"&gt;&lt;/DIV&gt;&lt;DIV id="_mcePaste"&gt;// Request the compiler to use 16-byte alignments for the arrays.&lt;/DIV&gt;&lt;DIV id="_mcePaste"&gt;__declspec(align(16)) float A&lt;S&gt;, B&lt;S&gt;, C&lt;S&gt;;&lt;/S&gt;&lt;/S&gt;&lt;/S&gt;&lt;/DIV&gt;&lt;DIV id="_mcePaste"&gt;__declspec(align(16)) int mask&lt;S&gt;;&lt;/S&gt;&lt;/DIV&gt;&lt;/DIV&gt;&lt;/DIV&gt;&lt;DIV id="_mcePaste"&gt;&lt;/DIV&gt;&lt;DIV id="_mcePaste"&gt;&lt;/DIV&gt;&lt;DIV id="_mcePaste"&gt;int main() {&lt;/DIV&gt;&lt;DIV id="_mcePaste"&gt; &lt;/DIV&gt;&lt;DIV id="_mcePaste"&gt;// Initialize the global arrays&lt;/DIV&gt;&lt;DIV id="_mcePaste"&gt;	A[:] = 0.0f;&lt;/DIV&gt;&lt;DIV id="_mcePaste"&gt;	B[:] = 1.0f / (A[:] + 1);&lt;/DIV&gt;&lt;DIV id="_mcePaste"&gt;	C[:] = B[:];&lt;/DIV&gt;&lt;DIV id="_mcePaste"&gt;	mask[:] = 0; mask[0:S/2:2] = 1;&lt;/DIV&gt;&lt;DIV id="_mcePaste"&gt;&lt;/DIV&gt;&lt;DIV id="_mcePaste"&gt;&lt;/DIV&gt;&lt;DIV id="_mcePaste"&gt;&lt;/DIV&gt;&lt;DIV id="_mcePaste"&gt;&lt;/DIV&gt;&lt;DIV id="_mcePaste"&gt;	for (int i = 0; i &amp;lt; ITERS; i++) {&lt;/DIV&gt;&lt;DIV id="_mcePaste"&gt;		//Invocation of the Array Notation implementation&lt;/DIV&gt;&lt;DIV id="_mcePaste"&gt;   &lt;/DIV&gt;&lt;DIV id="_mcePaste"&gt;		startTime = clock_it();&lt;/DIV&gt;&lt;DIV id="_mcePaste"&gt;		longvector(A,B,C,1.1f,mask);&lt;/DIV&gt;&lt;DIV id="_mcePaste"&gt;		endTime = clock_it();&lt;/DIV&gt;&lt;DIV id="_mcePaste"&gt;		execTime += (endTime - startTime);&lt;/DIV&gt;&lt;DIV id="_mcePaste"&gt;	}&lt;/DIV&gt;&lt;DIV id="_mcePaste"&gt; printf("Time taken in seconds with default Vector Length Array Notation implementation is %2.6f\n", execTime);&lt;/DIV&gt;&lt;DIV id="_mcePaste"&gt;&lt;/DIV&gt;&lt;DIV id="_mcePaste"&gt;&lt;/DIV&gt;&lt;DIV id="_mcePaste"&gt;	return 0;&lt;/DIV&gt;&lt;DIV id="_mcePaste"&gt;}&lt;/DIV&gt;&lt;/DIV&gt;&lt;DIV id="_mcePaste"&gt;&lt;/DIV&gt;&lt;DIV id="_mcePaste"&gt;&lt;DIV id="_mcePaste"&gt;__declspec(noinline) void longvector(float A&lt;S&gt;, float B&lt;S&gt;, float C&lt;S&gt;, float k,&lt;/S&gt;&lt;/S&gt;&lt;/S&gt;&lt;/DIV&gt;&lt;DIV id="_mcePaste"&gt;                  int mask&lt;S&gt;) {&lt;/S&gt;&lt;/DIV&gt;&lt;DIV id="_mcePaste"&gt;&lt;/DIV&gt;&lt;DIV id="_mcePaste"&gt;// Let the compiler know it is safe to assume that the function arguments&lt;/DIV&gt;&lt;DIV id="_mcePaste"&gt;// are 64-byte aligned.&lt;SPAN style="white-space: pre;"&gt;									&lt;/SPAN&gt;&lt;/DIV&gt;&lt;DIV id="_mcePaste"&gt;&lt;SPAN style="white-space: pre;"&gt;	&lt;/SPAN&gt;__assume_aligned(A,ALIGNMENT);&lt;/DIV&gt;&lt;DIV id="_mcePaste"&gt;&lt;SPAN style="white-space: pre;"&gt;	&lt;/SPAN&gt;__assume_aligned(B,ALIGNMENT);&lt;/DIV&gt;&lt;DIV id="_mcePaste"&gt;&lt;SPAN style="white-space: pre;"&gt;	&lt;/SPAN&gt;__assume_aligned(C,ALIGNMENT);&lt;/DIV&gt;&lt;DIV id="_mcePaste"&gt;  if (mask[:]) {&lt;/DIV&gt;&lt;DIV id="_mcePaste"&gt;   A[:] = B[:] + C[:] * k;&lt;/DIV&gt;&lt;DIV id="_mcePaste"&gt;  }&lt;/DIV&gt;&lt;DIV id="_mcePaste"&gt;}&lt;/DIV&gt;&lt;/DIV&gt;&lt;DIV&gt;&lt;/DIV&gt;&lt;DIV&gt;&lt;/DIV&gt;&lt;DIV&gt;The loop in the longvector() function is not being vectorized as it should. The report is:&lt;/DIV&gt;&lt;DIV&gt;&lt;/DIV&gt;&lt;DIV&gt;&lt;DIV&gt;ArrayNotation.cpp(56): warning : loop was not vectorized: existence of vector dependence.&lt;/DIV&gt;&lt;DIV&gt;ArrayNotation.cpp(56:5-56:5):VEC:?longvector@@YAXQAM00MQAH@Z: loop was not vectorized: existence of vector dependence&lt;/DIV&gt;&lt;DIV&gt;ArrayNotation.cpp(57:7-57:7):VEC:?longvector@@YAXQAM00MQAH@Z: potential FLOW dependence between A and B.&lt;/DIV&gt;&lt;DIV&gt;1&amp;gt; potential ANTI dependence between B and A.&lt;/DIV&gt;&lt;DIV&gt;ArrayNotation.cpp(56): warning : loop was not vectorized: existence of vector dependence.&lt;/DIV&gt;&lt;DIV&gt;ArrayNotation.cpp(56:5-56:5):VEC:?longvector@@YAXQAM00MQAH@Z: loop was not vectorized: existence of vector dependence&lt;/DIV&gt;&lt;DIV&gt;ArrayNotation.cpp(57:7-57:7):VEC:?longvector@@YAXQAM00MQAH@Z: potential FLOW dependence between A and B.&lt;/DIV&gt;&lt;DIV&gt;1&amp;gt; potential ANTI dependence between B and A.&lt;/DIV&gt;&lt;/DIV&gt;&lt;DIV&gt;&lt;/DIV&gt;&lt;DIV&gt;This is the same report given when simply trying to implement the scalar version of the code.&lt;/DIV&gt;&lt;DIV&gt;&lt;/DIV&gt;&lt;DIV&gt;Any help would be much appreciated.&lt;/DIV&gt;&lt;DIV&gt;&lt;/DIV&gt;&lt;DIV&gt;Thank you,&lt;/DIV&gt;&lt;DIV&gt;&lt;/DIV&gt;&lt;DIV&gt;Brad Kimbrough&lt;/DIV&gt;</description>
      <pubDate>Mon, 23 Jul 2012 19:38:35 GMT</pubDate>
      <guid>https://community.intel.com/t5/Software-Archive/VS2010-installation-problem/m-p/742264#M905</guid>
      <dc:creator>bkimbrough</dc:creator>
      <dc:date>2012-07-23T19:38:35Z</dc:date>
    </item>
    <item>
      <title>VS2010 installation problem</title>
      <link>https://community.intel.com/t5/Software-Archive/VS2010-installation-problem/m-p/742265#M906</link>
      <description>Hello Brad,&lt;BR /&gt;&lt;BR /&gt;thank you for the small code example. This makes it easy for us to reproduce. I'm using the latest update version (Intel Composer XE 2011 Update 11) in the following.&lt;BR /&gt;&lt;BR /&gt;The reason IntelliSense from Microsoft Visual Studio* does underline some keywords/directives is because our integration misses to register them. I've created a ticket to fix that in a future release (DPD200294636). It's not critical, though. You can continue without problems.&lt;BR /&gt;&lt;BR /&gt;Using the example you provided I see that function "&lt;I&gt;longvector(...)&lt;/I&gt;" is vectorized (excerpt from the function):&lt;BR /&gt;&lt;BR /&gt;[plain].B2.2:                          ; Preds .B2.2 .B2.1
$LN110:
        movaps    xmm7, XMMWORD PTR [edx+esi*4]                 ;23.7
$LN111:
        cvtps2pd  xmm3, xmm7                                    ;23.7
$LN112:
        movdqu    xmm4, XMMWORD PTR [edi+esi*4]                 ;22.5
$LN113:
        movhlps   xmm7, xmm7                                    ;23.7
$LN114:
        pcmpeqd   xmm4, xmm5                                    ;22.5
$LN115:
        cvtps2pd  xmm0, xmm7                                    ;23.7
$LN116:
        movaps    xmm7, XMMWORD PTR [ecx+esi*4]                 ;23.7
$LN117:
        pxor      xmm4, xmm6                                    ;22.5
$LN118:
        cvtps2pd  xmm1, xmm7                                    ;23.7
$LN119:
        movhlps   xmm7, xmm7                                    ;23.7
$LN120:
        cvtps2pd  xmm7, xmm7                                    ;23.7
$LN121:
        mulpd     xmm1, xmm2                                    ;23.7
$LN122:
        mulpd     xmm7, xmm2                                    ;23.7
$LN123:
        addpd     xmm3, xmm1                                    ;23.7
$LN124:
        addpd     xmm0, xmm7                                    ;23.7
$LN125:
        movups    xmm1, XMMWORD PTR [eax+esi*4]                 ;23.7
$LN126:
        cvtpd2ps  xmm3, xmm3                                    ;23.7
$LN127:
        cvtpd2ps  xmm0, xmm0                                    ;23.7
$LN128:
        movlhps   xmm3, xmm0                                    ;23.7
$LN129:
        andps     xmm3, xmm4                                    ;23.7
$LN130:
        andnps    xmm4, xmm1                                    ;23.7
$LN131:
        orps      xmm3, xmm4                                    ;23.7
$LN132:
        movaps    XMMWORD PTR [eax+esi*4], xmm3                 ;23.7
$LN133:
        add       esi, 4                                        ;22.5
$LN134:
        cmp       esi, 1024                                     ;22.5
$LN135:
        jb        .B2.2         ; Prob 99%                      ;22.5[/plain] &lt;BR /&gt;The &lt;I&gt;*ps&lt;/I&gt; and &lt;I&gt;*pd&lt;/I&gt; op-codes (e.g. &lt;I&gt;andps&lt;/I&gt;, &lt;I&gt;mulpd&lt;/I&gt;, etc.) indicate packed operations (p = packed), which is good!&lt;BR /&gt;&lt;BR /&gt;So, why don't you see it:&lt;BR /&gt;&lt;UL&gt;&lt;LI&gt;I don't have your implementation of "&lt;I&gt;clock_it()&lt;/I&gt;". However, keep in mind that there are some implementations of timer functions that don't work as expected on multi-core systems.&lt;BR /&gt;I'd recommend to use the "&lt;I&gt;rdtsc()&lt;/I&gt;" intrinsic which reads the clock ticks.&lt;BR /&gt;Also, and in general for benchmarking, you might turn off Intel SpeedStep, Intel Turbo Boost and (optional) Intel Hyper-Threading. The reason for this is to get comparable CPU performance between benchmark runs.&lt;/LI&gt;&lt;LI&gt;Maybe you're using an older compiler version that cannot vectorize the code you provided. The most recent version can to: I don't get warnings about dependencies in the vectorization report and the above assembly is created.&lt;/LI&gt;&lt;/UL&gt;&lt;BR /&gt;Best regards,&lt;BR /&gt;&lt;BR /&gt;Georg Zitzlsberger&lt;BR /&gt;</description>
      <pubDate>Tue, 24 Jul 2012 12:55:52 GMT</pubDate>
      <guid>https://community.intel.com/t5/Software-Archive/VS2010-installation-problem/m-p/742265#M906</guid>
      <dc:creator>Georg_Z_Intel</dc:creator>
      <dc:date>2012-07-24T12:55:52Z</dc:date>
    </item>
    <item>
      <title>Hello,</title>
      <link>https://community.intel.com/t5/Software-Archive/VS2010-installation-problem/m-p/742266#M907</link>
      <description>Hello,

I'd like to inform you that we can not fix DPD200294636 (incorrect syntax highlighting of keywords/directives). The reason is the API of integrations into Microsoft Visual Studio* that would require unreasonable efforts on our side. So, please ignore the underlining of IntelliSense in such cases.

Best regards,

Georg Zitzlsberger</description>
      <pubDate>Wed, 10 Oct 2012 12:38:38 GMT</pubDate>
      <guid>https://community.intel.com/t5/Software-Archive/VS2010-installation-problem/m-p/742266#M907</guid>
      <dc:creator>Georg_Z_Intel</dc:creator>
      <dc:date>2012-10-10T12:38:38Z</dc:date>
    </item>
  </channel>
</rss>

