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    <title>topic Dear Jesus， in Intel® Software Guard Extensions (Intel® SGX)</title>
    <link>https://community.intel.com/t5/Intel-Software-Guard-Extensions/A-problem-about-the-Seal-key-on-multi-socket-CPU/m-p/1184829#M3654</link>
    <description>&lt;P&gt;Dear&amp;nbsp;Jesus，&lt;/P&gt;&lt;P&gt;&amp;nbsp;&amp;nbsp;First of all, thank you for your prompt reply.&lt;/P&gt;&lt;P&gt;&amp;nbsp; But, how about the Intel SGX Card ? (refer to &lt;A href="https://www.securityweek.com/intel-sgx-card-extends-memory-protections-existing-cloud-servers)" target="_blank"&gt;https://www.securityweek.com/intel-sgx-card-extends-memory-protections-existing-cloud-servers)&lt;/A&gt;&lt;/P&gt;&lt;P&gt;&amp;nbsp; "The SGX Card, a device that can be attached to existing servers via PCI Express, contains three independent SGX-enabled Xeon E processors. Intel says up to four cards – totaling 12 SGX-enabled processors, can be added to a standard 2U Intel Xeon Scalable server".&lt;/P&gt;&lt;P&gt;&amp;nbsp; &amp;nbsp;If our server&amp;nbsp;attaches&amp;nbsp;the Intel SGX Card with&amp;nbsp;three independent SGX-enabled Xeon E processors, the Seal and UnSeal functions will work ok ?&lt;/P&gt;</description>
    <pubDate>Wed, 27 May 2020 03:40:00 GMT</pubDate>
    <dc:creator>pp__monkeyking</dc:creator>
    <dc:date>2020-05-27T03:40:00Z</dc:date>
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      <title>A problem about the Seal key on multi-socket CPU</title>
      <link>https://community.intel.com/t5/Intel-Software-Guard-Extensions/A-problem-about-the-Seal-key-on-multi-socket-CPU/m-p/1184827#M3652</link>
      <description>&lt;P&gt;Hello,&lt;/P&gt;&lt;P&gt;&amp;nbsp; &amp;nbsp; I am trying to test sgx enclave's seal&amp;amp;unseal functions on Linux which is running on&amp;nbsp;multi-socket CPU， E.g:&lt;/P&gt;&lt;P&gt;&amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp;&amp;nbsp;Thread(s) per core: &amp;nbsp; &amp;nbsp;2&lt;BR /&gt;&amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; Core(s) per socket: &amp;nbsp; &amp;nbsp;6&lt;BR /&gt;&amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; Socket(s): &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; 2&lt;/P&gt;&lt;P&gt;&amp;nbsp; &amp;nbsp; If my seal key policy set to :&lt;/P&gt;&lt;P&gt;&amp;nbsp; &amp;nbsp;&amp;nbsp;uint16_t key_policy = SGX_KEYPOLICY_MRSIGNER; // SGX_KEYPOLICY_MRENCLAVE;&lt;/P&gt;&lt;P&gt;&amp;nbsp; &amp;nbsp; then:&lt;/P&gt;&lt;P&gt;&amp;nbsp; &amp;nbsp; if I seal data to /tmp/data1.dat by the Seal_App which just running on CPU-socket-1,&lt;/P&gt;&lt;P&gt;&amp;nbsp; &amp;nbsp; can&amp;nbsp;/tmp/data1.dat be unsealed&amp;nbsp;by the UnSeal_App which just running on CPU-socket-2 ???&lt;/P&gt;&lt;P&gt;&amp;nbsp; &amp;nbsp; Note:&amp;nbsp;Seal_App and&amp;nbsp;UnSeal_App are signed by the same enclave-SIGNER.&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;&amp;nbsp; &amp;nbsp; And, Where can I find related instructions ???&lt;/P&gt;</description>
      <pubDate>Wed, 20 May 2020 10:15:49 GMT</pubDate>
      <guid>https://community.intel.com/t5/Intel-Software-Guard-Extensions/A-problem-about-the-Seal-key-on-multi-socket-CPU/m-p/1184827#M3652</guid>
      <dc:creator>pp__monkeyking</dc:creator>
      <dc:date>2020-05-20T10:15:49Z</dc:date>
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      <title>Hello Monkeyking,</title>
      <link>https://community.intel.com/t5/Intel-Software-Guard-Extensions/A-problem-about-the-Seal-key-on-multi-socket-CPU/m-p/1184828#M3653</link>
      <description>&lt;P&gt;Hello Monkeyking,&lt;/P&gt;&lt;P&gt;You don't have to worry about this. There is no dual-socket SGX-capable processor on the market.&lt;/P&gt;&lt;P&gt;Regards,&lt;/P&gt;&lt;P&gt;Jesus&lt;/P&gt;&lt;P&gt;Intel Customer Support&lt;/P&gt;</description>
      <pubDate>Wed, 20 May 2020 20:36:42 GMT</pubDate>
      <guid>https://community.intel.com/t5/Intel-Software-Guard-Extensions/A-problem-about-the-Seal-key-on-multi-socket-CPU/m-p/1184828#M3653</guid>
      <dc:creator>JesusG_Intel</dc:creator>
      <dc:date>2020-05-20T20:36:42Z</dc:date>
    </item>
    <item>
      <title>Dear Jesus，</title>
      <link>https://community.intel.com/t5/Intel-Software-Guard-Extensions/A-problem-about-the-Seal-key-on-multi-socket-CPU/m-p/1184829#M3654</link>
      <description>&lt;P&gt;Dear&amp;nbsp;Jesus，&lt;/P&gt;&lt;P&gt;&amp;nbsp;&amp;nbsp;First of all, thank you for your prompt reply.&lt;/P&gt;&lt;P&gt;&amp;nbsp; But, how about the Intel SGX Card ? (refer to &lt;A href="https://www.securityweek.com/intel-sgx-card-extends-memory-protections-existing-cloud-servers)" target="_blank"&gt;https://www.securityweek.com/intel-sgx-card-extends-memory-protections-existing-cloud-servers)&lt;/A&gt;&lt;/P&gt;&lt;P&gt;&amp;nbsp; "The SGX Card, a device that can be attached to existing servers via PCI Express, contains three independent SGX-enabled Xeon E processors. Intel says up to four cards – totaling 12 SGX-enabled processors, can be added to a standard 2U Intel Xeon Scalable server".&lt;/P&gt;&lt;P&gt;&amp;nbsp; &amp;nbsp;If our server&amp;nbsp;attaches&amp;nbsp;the Intel SGX Card with&amp;nbsp;three independent SGX-enabled Xeon E processors, the Seal and UnSeal functions will work ok ?&lt;/P&gt;</description>
      <pubDate>Wed, 27 May 2020 03:40:00 GMT</pubDate>
      <guid>https://community.intel.com/t5/Intel-Software-Guard-Extensions/A-problem-about-the-Seal-key-on-multi-socket-CPU/m-p/1184829#M3654</guid>
      <dc:creator>pp__monkeyking</dc:creator>
      <dc:date>2020-05-27T03:40:00Z</dc:date>
    </item>
    <item>
      <title>Hello Monkeyking,</title>
      <link>https://community.intel.com/t5/Intel-Software-Guard-Extensions/A-problem-about-the-Seal-key-on-multi-socket-CPU/m-p/1184830#M3655</link>
      <description>&lt;P&gt;Hello Monkeyking,&lt;/P&gt;&lt;P&gt;Here is more detailed information on the&amp;nbsp;&lt;A href="https://software.intel.com/content/www/us/en/develop/articles/getting-started-with-the-intel-software-guard-extensions-card.html"&gt;Intel SGX Card&lt;/A&gt;. "Independent" means the processors act as completely separate systems with their own OS, memory, storage, etc. The processors do not share anything with each other. Each SGX processor behaves as a physically separate server so any interaction among the processors is carried out as if they were physically separate. You cannot seal/unseal directly using their individual sealing keys. If you wanted to Seal and Unseal using the different processors in the card, you would have to use remote attestation to hand out shared keys.&lt;/P&gt;&lt;P&gt;In short, the card does not make your server into a multi-processor system. It creates multiple, single processor systems that are completely independent from each other.&lt;/P&gt;&lt;P&gt;Regards,&lt;/P&gt;</description>
      <pubDate>Wed, 27 May 2020 16:58:39 GMT</pubDate>
      <guid>https://community.intel.com/t5/Intel-Software-Guard-Extensions/A-problem-about-the-Seal-key-on-multi-socket-CPU/m-p/1184830#M3655</guid>
      <dc:creator>JesusG_Intel</dc:creator>
      <dc:date>2020-05-27T16:58:39Z</dc:date>
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