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    <title>topic Thread handling in SGX in Intel® Software Guard Extensions (Intel® SGX)</title>
    <link>https://community.intel.com/t5/Intel-Software-Guard-Extensions/Thread-handling-in-SGX/m-p/1292867#M4701</link>
    <description>&lt;P&gt;Hello,&lt;/P&gt;
&lt;P&gt;&amp;nbsp;&lt;/P&gt;
&lt;P&gt;This is an extension of previous thread :&amp;nbsp;&lt;A href="https://community.intel.com/t5/Intel-Software-Guard-Extensions/SGX-Threads-behavior/td-p/1290722/jump-to/first-unread-message" target="_blank"&gt;https://community.intel.com/t5/Intel-Software-Guard-Extensions/SGX-Threads-behavior/td-p/1290722/jump-to/first-unread-message&lt;/A&gt;&lt;/P&gt;
&lt;P&gt;&amp;nbsp;&lt;/P&gt;
&lt;P&gt;I need clarifications on few thread related topics,&lt;/P&gt;
&lt;P&gt;&amp;nbsp;&lt;/P&gt;
&lt;P&gt;1. Only N number of simultaneous threads can run in SGX enclave in a N core machine because each thread will be binded to a physical core.&lt;BR /&gt;TCS NUM( Thread Control Structure ) will decide how many threads can spawn in the SGX Enclave. Lets say M (M&amp;gt;N) is set as TCSNUM the N thread can run simultaneouly and the remaining M-N threads will have to wait for their schedule.&lt;/P&gt;
&lt;P&gt;Is my understanding correct? Can we have more number of TCS than the number of cores?&lt;/P&gt;
&lt;P&gt;&lt;BR /&gt;2. Regarding the TCSPolicy Binded/Non-binded mode. Give me some examples that explains when to use either of them.&lt;/P&gt;
&lt;P&gt;&amp;nbsp;&lt;/P&gt;
&lt;P&gt;Thanks&lt;/P&gt;
&lt;P&gt;Anand&lt;/P&gt;</description>
    <pubDate>Thu, 24 Jun 2021 09:35:11 GMT</pubDate>
    <dc:creator>Anandakumar</dc:creator>
    <dc:date>2021-06-24T09:35:11Z</dc:date>
    <item>
      <title>Thread handling in SGX</title>
      <link>https://community.intel.com/t5/Intel-Software-Guard-Extensions/Thread-handling-in-SGX/m-p/1292867#M4701</link>
      <description>&lt;P&gt;Hello,&lt;/P&gt;
&lt;P&gt;&amp;nbsp;&lt;/P&gt;
&lt;P&gt;This is an extension of previous thread :&amp;nbsp;&lt;A href="https://community.intel.com/t5/Intel-Software-Guard-Extensions/SGX-Threads-behavior/td-p/1290722/jump-to/first-unread-message" target="_blank"&gt;https://community.intel.com/t5/Intel-Software-Guard-Extensions/SGX-Threads-behavior/td-p/1290722/jump-to/first-unread-message&lt;/A&gt;&lt;/P&gt;
&lt;P&gt;&amp;nbsp;&lt;/P&gt;
&lt;P&gt;I need clarifications on few thread related topics,&lt;/P&gt;
&lt;P&gt;&amp;nbsp;&lt;/P&gt;
&lt;P&gt;1. Only N number of simultaneous threads can run in SGX enclave in a N core machine because each thread will be binded to a physical core.&lt;BR /&gt;TCS NUM( Thread Control Structure ) will decide how many threads can spawn in the SGX Enclave. Lets say M (M&amp;gt;N) is set as TCSNUM the N thread can run simultaneouly and the remaining M-N threads will have to wait for their schedule.&lt;/P&gt;
&lt;P&gt;Is my understanding correct? Can we have more number of TCS than the number of cores?&lt;/P&gt;
&lt;P&gt;&lt;BR /&gt;2. Regarding the TCSPolicy Binded/Non-binded mode. Give me some examples that explains when to use either of them.&lt;/P&gt;
&lt;P&gt;&amp;nbsp;&lt;/P&gt;
&lt;P&gt;Thanks&lt;/P&gt;
&lt;P&gt;Anand&lt;/P&gt;</description>
      <pubDate>Thu, 24 Jun 2021 09:35:11 GMT</pubDate>
      <guid>https://community.intel.com/t5/Intel-Software-Guard-Extensions/Thread-handling-in-SGX/m-p/1292867#M4701</guid>
      <dc:creator>Anandakumar</dc:creator>
      <dc:date>2021-06-24T09:35:11Z</dc:date>
    </item>
    <item>
      <title>Re:Thread handling in SGX</title>
      <link>https://community.intel.com/t5/Intel-Software-Guard-Extensions/Thread-handling-in-SGX/m-p/1293101#M4702</link>
      <description>&lt;P&gt;Hello Anand,&lt;/P&gt;&lt;P&gt;&lt;BR /&gt;&lt;/P&gt;&lt;OL&gt;&lt;LI&gt;&lt;SPAN style="font-family: &amp;quot;Segoe UI&amp;quot;, sans-serif; font-size: 10pt;"&gt;YES. You can configure a higher TCS_NUM than the number of logical processors on a system.&lt;/SPAN&gt;&lt;/LI&gt;&lt;LI&gt;&lt;SPAN style="font-family: &amp;quot;Intel Clear&amp;quot;, sans-serif; font-size: 10pt;"&gt;TCS_POLICY causes confusion because there are 2 aspects related to it, which might not be clearly explained in our documentation.&lt;/SPAN&gt;&lt;/LI&gt;&lt;/OL&gt;&lt;P&gt;&lt;SPAN style="font-family: &amp;quot;Intel Clear&amp;quot;, sans-serif; font-size: 10pt;"&gt;&amp;nbsp;&lt;/SPAN&gt;&lt;/P&gt;&lt;UL&gt;&lt;LI&gt;&lt;SPAN style="font-family: &amp;quot;Intel Clear&amp;quot;, sans-serif; font-size: 10pt;"&gt;Trusted (Enclave component):&lt;/SPAN&gt;&lt;UL&gt;&lt;LI&gt;&lt;SPAN style="font-family: &amp;quot;Intel Clear&amp;quot;, sans-serif; font-size: 10pt;"&gt;Unbinding policy (1): Thread Local Storage (TLS) area for each Thread Context (TCS) is reinitialized on every root ECALL.&lt;/SPAN&gt;&lt;/LI&gt;&lt;LI&gt;&lt;SPAN style="font-family: &amp;quot;Intel Clear&amp;quot;, sans-serif; font-size: 10pt;"&gt;Binding policy (0): Thread Local Storage (TLS) is not initialized on every ECALL.&lt;/SPAN&gt;&lt;/LI&gt;&lt;/UL&gt;&lt;/LI&gt;&lt;LI&gt;&lt;SPAN style="font-family: &amp;quot;Intel Clear&amp;quot;, sans-serif; font-size: 10pt;"&gt;Untrusted (loader component):&lt;/SPAN&gt;&lt;UL&gt;&lt;LI&gt;&lt;SPAN style="font-family: &amp;quot;Intel Clear&amp;quot;, sans-serif; font-size: 10pt;"&gt;Unbinding policy (1): On every root ECALL, the uRTS finds the first available TCS and assigns said TCS to the untrusted thread.&lt;/SPAN&gt;&lt;/LI&gt;&lt;LI&gt;&lt;SPAN style="font-family: &amp;quot;Intel Clear&amp;quot;, sans-serif; font-size: 10pt;"&gt;Binding policy (0): The uRTS binds the untrusted thread to a TCS.&lt;/SPAN&gt;&lt;/LI&gt;&lt;/UL&gt;&lt;/LI&gt;&lt;/UL&gt;&lt;P&gt;&lt;SPAN style="font-family: &amp;quot;Intel Clear&amp;quot;, sans-serif; font-size: 10pt;"&gt;As long as the untrusted thread is alive, the TCS cannot be used for another thread.&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN style="font-family: &amp;quot;Intel Clear&amp;quot;, sans-serif; font-size: 10pt;"&gt;When an application creates more threads than TCSes and uses this policy you get SGX_ERROR_OUT_OF_TCS.&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN style="font-family: &amp;quot;Intel Clear&amp;quot;, sans-serif; font-size: 10pt;"&gt;&amp;nbsp;&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN style="font-family: &amp;quot;Intel Clear&amp;quot;, sans-serif; font-size: 10pt;"&gt;Binding was the default policy in the initial versions of the SGX SDK.&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN style="font-family: &amp;quot;Intel Clear&amp;quot;, sans-serif; font-size: 10pt;"&gt;Then we realized that developers could run into issues with binding policy if they weren’t careful using thread synchronization functions.&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;BR /&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN style="font-family: &amp;quot;Intel Clear&amp;quot;, sans-serif; font-size: 10pt;"&gt;For that reason, we switched the default policy to unbinding (TCS_POLICY 1).&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;BR /&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN style="font-family: &amp;quot;Intel Clear&amp;quot;, sans-serif; font-size: 10pt;"&gt;The binding policy (TCS_NUM 0) is useful if an enclave requires preserving TLS across root ECALLs.&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN style="font-family: &amp;quot;Intel Clear&amp;quot;, sans-serif; font-size: 10pt;"&gt;However, we are not aware of any use case that requires this feature.&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;BR /&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN style="font-family: &amp;quot;Intel Clear&amp;quot;, sans-serif; font-size: 10pt;"&gt;In general, use the current default (unbinding - &lt;/SPAN&gt;&lt;SPAN style="font-family: &amp;quot;Intel Clear&amp;quot;, sans-serif; font-size: 13.3333px;"&gt;TCS_POLICY 1).&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;BR /&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN style="font-family: &amp;quot;Intel Clear&amp;quot;, sans-serif; font-size: 13.3333px;"&gt;Sincerely,&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN style="font-family: &amp;quot;Intel Clear&amp;quot;, sans-serif; font-size: 13.3333px;"&gt;Jesus G.&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN style="font-family: &amp;quot;Intel Clear&amp;quot;, sans-serif; font-size: 13.3333px;"&gt;Intel Customer Support&lt;/SPAN&gt;&lt;/P&gt;&lt;BR /&gt;</description>
      <pubDate>Fri, 25 Jun 2021 00:34:01 GMT</pubDate>
      <guid>https://community.intel.com/t5/Intel-Software-Guard-Extensions/Thread-handling-in-SGX/m-p/1293101#M4702</guid>
      <dc:creator>JesusG_Intel</dc:creator>
      <dc:date>2021-06-25T00:34:01Z</dc:date>
    </item>
    <item>
      <title>Re:Thread handling in SGX</title>
      <link>https://community.intel.com/t5/Intel-Software-Guard-Extensions/Thread-handling-in-SGX/m-p/1294074#M4708</link>
      <description>&lt;P&gt;&lt;B&gt;This thread has been marked as answered and Intel will no longer monitor this thread. If you want a response from Intel in a follow-up question, please open a new thread.&lt;/B&gt;&lt;/P&gt;&lt;BR /&gt;</description>
      <pubDate>Mon, 28 Jun 2021 20:57:32 GMT</pubDate>
      <guid>https://community.intel.com/t5/Intel-Software-Guard-Extensions/Thread-handling-in-SGX/m-p/1294074#M4708</guid>
      <dc:creator>JesusG_Intel</dc:creator>
      <dc:date>2021-06-28T20:57:32Z</dc:date>
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