https://community.intel.com/t5/Intel-Confidential-Computing/using-cache-memory-to-save-user-s-data-inside-enclave-in-IPFS/m-p/1585086#M6137 <H5>Hello there,</H5><H5>&nbsp;</H5><H5>In the SGX developer guide, there is some information related to cache memory in IPFS</H5><P>&nbsp;</P><H5>content from SGX-developer guide:</H5><H5>To enhance the performance of the Protected File System, cache is used to<BR />save the user’s data inside the enclave, and only when the cache is full it is<BR />flushed to disk.<BR />In case of S3/S4 transitions, data in the cache will be lost (the entire enclave is<BR />los). Therefore, all file handles must be flushed or closed before entering<BR />S3/S4.</H5><H5><BR /><BR />here, what does this cache refers to? EPC/M related or CPU's cache memory.<BR /><BR /><BR />Thanks,<BR />Arun<BR /><BR /></H5> Mon, 01 Apr 2024 11:59:03 GMT Arun_M 2024-04-01T11:59:03Z https://community.intel.com/t5/Intel-Confidential-Computing/using-cache-memory-to-save-user-s-data-inside-enclave-in-IPFS/m-p/1585086#M6137 <H5>Hello there,</H5><H5>&nbsp;</H5><H5>In the SGX developer guide, there is some information related to cache memory in IPFS</H5><P>&nbsp;</P><H5>content from SGX-developer guide:</H5><H5>To enhance the performance of the Protected File System, cache is used to<BR />save the user’s data inside the enclave, and only when the cache is full it is<BR />flushed to disk.<BR />In case of S3/S4 transitions, data in the cache will be lost (the entire enclave is<BR />los). Therefore, all file handles must be flushed or closed before entering<BR />S3/S4.</H5><H5><BR /><BR />here, what does this cache refers to? EPC/M related or CPU's cache memory.<BR /><BR /><BR />Thanks,<BR />Arun<BR /><BR /></H5> Mon, 01 Apr 2024 11:59:03 GMT https://community.intel.com/t5/Intel-Confidential-Computing/using-cache-memory-to-save-user-s-data-inside-enclave-in-IPFS/m-p/1585086#M6137 Arun_M 2024-04-01T11:59:03Z