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    <title>topic Hi, in Intel® Software Guard Extensions (Intel® SGX)</title>
    <link>https://community.intel.com/t5/Intel-Software-Guard-Extensions/About-Power-Transition/m-p/1088505#M739</link>
    <description>&lt;P&gt;Hi,&lt;/P&gt;

&lt;P&gt;SGX also supports G3 state. When the system gets shutdown, the application may register a callback function for such events. When the callback function is invoked then the application may call the enclave specifically to save secret state to disk for preservation. However, the operating system does not guarantee that the enclave will be given enough time to seal all its internal state. Enclaves that &lt;SPAN style="font-size: 1em;"&gt;wish to preserve state across&amp;nbsp;&lt;/SPAN&gt;&lt;SPAN style="font-size: 1em;"&gt;power transition events must periodically seal enclave state data outside the enclave (on disk or&amp;nbsp;&lt;/SPAN&gt;&lt;SPAN style="font-size: 1em;"&gt;the cloud). On re-instantiation of the application, the enclave is rebuilt from scratch and the&amp;nbsp;&lt;/SPAN&gt;&lt;SPAN style="font-size: 1em;"&gt;enclave must retrieve its protected state (from disk or the cloud) inside the enclave.&lt;/SPAN&gt;&lt;/P&gt;

&lt;P&gt;&lt;BR style="line-height: normal; text-align: -webkit-auto; text-size-adjust: auto;" /&gt;
	&amp;nbsp;&lt;/P&gt;</description>
    <pubDate>Thu, 17 Nov 2016 11:24:48 GMT</pubDate>
    <dc:creator>PadmaPriya_M_Intel</dc:creator>
    <dc:date>2016-11-17T11:24:48Z</dc:date>
    <item>
      <title>About Power Transition</title>
      <link>https://community.intel.com/t5/Intel-Software-Guard-Extensions/About-Power-Transition/m-p/1088504#M738</link>
      <description>&lt;P&gt;Hi,&lt;/P&gt;

&lt;P&gt;According to&amp;nbsp;https://01.org/sites/default/files/documentation/intel_sgx_developer_guide_pdf.pdf&lt;/P&gt;

&lt;P&gt;"&lt;EM&gt;Enclaves that wish to preserve secrets across S3, S4, and S5 must save state information on disk.&lt;/EM&gt;"&lt;/P&gt;

&lt;P&gt;&amp;nbsp;&lt;/P&gt;

&lt;P&gt;&lt;SPAN style="font-size: 1em;"&gt;Does this mean that SGx enclave recovery doesn't include support for power state &lt;/SPAN&gt;&lt;SPAN style="font-size: 1em;"&gt;Mechanical Off state (G3)?&lt;/SPAN&gt;&lt;/P&gt;

&lt;P&gt;So when the system with an enclave gets shutdown, it won't be possible anymore to resume enclave processes?&lt;/P&gt;

&lt;P&gt;&amp;nbsp;&lt;/P&gt;

&lt;P&gt;Thanks.&lt;/P&gt;

&lt;P&gt;&amp;nbsp;&lt;/P&gt;</description>
      <pubDate>Wed, 16 Nov 2016 18:37:09 GMT</pubDate>
      <guid>https://community.intel.com/t5/Intel-Software-Guard-Extensions/About-Power-Transition/m-p/1088504#M738</guid>
      <dc:creator>Mashiro_M_1</dc:creator>
      <dc:date>2016-11-16T18:37:09Z</dc:date>
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    <item>
      <title>Hi,</title>
      <link>https://community.intel.com/t5/Intel-Software-Guard-Extensions/About-Power-Transition/m-p/1088505#M739</link>
      <description>&lt;P&gt;Hi,&lt;/P&gt;

&lt;P&gt;SGX also supports G3 state. When the system gets shutdown, the application may register a callback function for such events. When the callback function is invoked then the application may call the enclave specifically to save secret state to disk for preservation. However, the operating system does not guarantee that the enclave will be given enough time to seal all its internal state. Enclaves that &lt;SPAN style="font-size: 1em;"&gt;wish to preserve state across&amp;nbsp;&lt;/SPAN&gt;&lt;SPAN style="font-size: 1em;"&gt;power transition events must periodically seal enclave state data outside the enclave (on disk or&amp;nbsp;&lt;/SPAN&gt;&lt;SPAN style="font-size: 1em;"&gt;the cloud). On re-instantiation of the application, the enclave is rebuilt from scratch and the&amp;nbsp;&lt;/SPAN&gt;&lt;SPAN style="font-size: 1em;"&gt;enclave must retrieve its protected state (from disk or the cloud) inside the enclave.&lt;/SPAN&gt;&lt;/P&gt;

&lt;P&gt;&lt;BR style="line-height: normal; text-align: -webkit-auto; text-size-adjust: auto;" /&gt;
	&amp;nbsp;&lt;/P&gt;</description>
      <pubDate>Thu, 17 Nov 2016 11:24:48 GMT</pubDate>
      <guid>https://community.intel.com/t5/Intel-Software-Guard-Extensions/About-Power-Transition/m-p/1088505#M739</guid>
      <dc:creator>PadmaPriya_M_Intel</dc:creator>
      <dc:date>2016-11-17T11:24:48Z</dc:date>
    </item>
    <item>
      <title> </title>
      <link>https://community.intel.com/t5/Intel-Software-Guard-Extensions/About-Power-Transition/m-p/1088506#M740</link>
      <description>&lt;P&gt;&amp;nbsp;&lt;/P&gt;

&lt;P&gt;Thank you for the answer Padma!&lt;BR /&gt;
	Marked that as the best reply!&lt;/P&gt;

&lt;P&gt;To summarize my understanding, and please correct me if I am wrong somewhere:&lt;BR /&gt;
	For example, the secret is a simple text phrase randomly generated inside an enclave, and I would want to retain it even after the platform shuts down (G3).&amp;nbsp;&lt;BR /&gt;
	So in my enclave, I would...&amp;nbsp;&lt;BR /&gt;
	&amp;nbsp;&amp;nbsp; &amp;nbsp;+ invoke sgx_seal_data() for that text phrase to be sealed,&amp;nbsp;&lt;BR /&gt;
	&amp;nbsp;&amp;nbsp; &amp;nbsp;+ then I would have the now sealed phrase saved to a (maybe a .txt) file outside my enclave and into the hard-disk...&lt;BR /&gt;
	so that the next time that an enclave gets instantiated, I would not have to generate a random word anymore, but rather&amp;nbsp;&lt;BR /&gt;
	&amp;nbsp;&amp;nbsp; &amp;nbsp;+ read on that file,&amp;nbsp;&lt;BR /&gt;
	&amp;nbsp;&amp;nbsp; &amp;nbsp;+ extract the sealed text phrase,&amp;nbsp;&lt;BR /&gt;
	&amp;nbsp;&amp;nbsp; &amp;nbsp;+ and do sgx_unseal_data() upon it to be able to have the secret text again.&lt;/P&gt;

&lt;P&gt;Lastly, would the data stored in the hard-disk be safe from any forced-decryption? Or is it outside the scope anymore of the SGx?&lt;/P&gt;</description>
      <pubDate>Thu, 17 Nov 2016 19:00:20 GMT</pubDate>
      <guid>https://community.intel.com/t5/Intel-Software-Guard-Extensions/About-Power-Transition/m-p/1088506#M740</guid>
      <dc:creator>Mashiro_M_1</dc:creator>
      <dc:date>2016-11-17T19:00:20Z</dc:date>
    </item>
    <item>
      <title>Hi,</title>
      <link>https://community.intel.com/t5/Intel-Software-Guard-Extensions/About-Power-Transition/m-p/1088507#M741</link>
      <description>&lt;P&gt;Hi,&lt;/P&gt;

&lt;P&gt;Please refer the section no:7.2 about Sealing and Unsealing Process(page.no:23) in the attached document for your clear understanding.&lt;/P&gt;

&lt;P&gt;-Thanks&lt;/P&gt;</description>
      <pubDate>Fri, 18 Nov 2016 05:40:24 GMT</pubDate>
      <guid>https://community.intel.com/t5/Intel-Software-Guard-Extensions/About-Power-Transition/m-p/1088507#M741</guid>
      <dc:creator>PadmaPriya_M_Intel</dc:creator>
      <dc:date>2016-11-18T05:40:24Z</dc:date>
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