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    <title>topic How to register AEP to handle AEX？ in Intel® Software Guard Extensions (Intel® SGX)</title>
    <link>https://community.intel.com/t5/Intel-Software-Guard-Extensions/How-to-register-AEP-to-handle-AEX/m-p/1088508#M742</link>
    <description>&lt;P&gt;Hi,&lt;/P&gt;

&lt;P&gt;&amp;nbsp; &amp;nbsp; When app is executing in the enclave, can it be interrupted by system clock interrupts? &amp;nbsp;&lt;/P&gt;

&lt;P&gt;&amp;nbsp; &amp;nbsp; How to register an AEP , which is used as an EENTER parameter, to handle interrupts that caused enclave AEX? I've noted the&amp;nbsp;&lt;EM&gt;sgx_register_exception_handler&lt;/EM&gt;() api , but it's used to handle exceptions and registered in enclave. That's not what I need.&lt;/P&gt;

&lt;P&gt;&amp;nbsp;&lt;/P&gt;

&lt;P&gt;Thanks&lt;/P&gt;

&lt;P&gt;Yu&lt;/P&gt;

&lt;P&gt;&amp;nbsp;&lt;/P&gt;</description>
    <pubDate>Mon, 06 Feb 2017 02:13:01 GMT</pubDate>
    <dc:creator>shen_y_</dc:creator>
    <dc:date>2017-02-06T02:13:01Z</dc:date>
    <item>
      <title>How to register AEP to handle AEX？</title>
      <link>https://community.intel.com/t5/Intel-Software-Guard-Extensions/How-to-register-AEP-to-handle-AEX/m-p/1088508#M742</link>
      <description>&lt;P&gt;Hi,&lt;/P&gt;

&lt;P&gt;&amp;nbsp; &amp;nbsp; When app is executing in the enclave, can it be interrupted by system clock interrupts? &amp;nbsp;&lt;/P&gt;

&lt;P&gt;&amp;nbsp; &amp;nbsp; How to register an AEP , which is used as an EENTER parameter, to handle interrupts that caused enclave AEX? I've noted the&amp;nbsp;&lt;EM&gt;sgx_register_exception_handler&lt;/EM&gt;() api , but it's used to handle exceptions and registered in enclave. That's not what I need.&lt;/P&gt;

&lt;P&gt;&amp;nbsp;&lt;/P&gt;

&lt;P&gt;Thanks&lt;/P&gt;

&lt;P&gt;Yu&lt;/P&gt;

&lt;P&gt;&amp;nbsp;&lt;/P&gt;</description>
      <pubDate>Mon, 06 Feb 2017 02:13:01 GMT</pubDate>
      <guid>https://community.intel.com/t5/Intel-Software-Guard-Extensions/How-to-register-AEP-to-handle-AEX/m-p/1088508#M742</guid>
      <dc:creator>shen_y_</dc:creator>
      <dc:date>2017-02-06T02:13:01Z</dc:date>
    </item>
    <item>
      <title>The uRTS automatically</title>
      <link>https://community.intel.com/t5/Intel-Software-Guard-Extensions/How-to-register-AEP-to-handle-AEX/m-p/1088509#M743</link>
      <description>&lt;P&gt;The uRTS automatically registers (or provides) the AEP for each enclave call (ECALL).&lt;/P&gt;

&lt;P&gt;If an AEX happens, such as a clock interrupt, after the interrupt is served the OS will return control to the AEP, which will then ERESUME into the enclave.&lt;/P&gt;

&lt;P&gt;The sgx_register_exception_handler() API is to register a routine that will handle exceptions inside the enclave, for instance if an enclave executes an illegal instruction such as CPUID.&lt;/P&gt;</description>
      <pubDate>Thu, 09 Feb 2017 16:03:17 GMT</pubDate>
      <guid>https://community.intel.com/t5/Intel-Software-Guard-Extensions/How-to-register-AEP-to-handle-AEX/m-p/1088509#M743</guid>
      <dc:creator>Juan_d_Intel</dc:creator>
      <dc:date>2017-02-09T16:03:17Z</dc:date>
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