https://community.intel.com/t5/Software-Tuning-Performance/Disabling-cache-coherancy/m-p/823053#M1024 Hello balu,<BR />You can define a memory region as not cacheable. <BR />Then reads from and writes to that region of memory are not checked for coherency.<BR />Is this what you are looking for?<BR />Pat Wed, 16 May 2012 02:25:21 GMT Patrick_F_Intel1 2012-05-16T02:25:21Z https://community.intel.com/t5/Software-Tuning-Performance/Disabling-cache-coherancy/m-p/823052#M1023 Is there a way to disable cache coherency in intel sandybridge? Mon, 14 May 2012 11:00:22 GMT https://community.intel.com/t5/Software-Tuning-Performance/Disabling-cache-coherancy/m-p/823052#M1023 balu_r_0212 2012-05-14T11:00:22Z https://community.intel.com/t5/Software-Tuning-Performance/Disabling-cache-coherancy/m-p/823053#M1024 Hello balu,<BR />You can define a memory region as not cacheable. <BR />Then reads from and writes to that region of memory are not checked for coherency.<BR />Is this what you are looking for?<BR />Pat Wed, 16 May 2012 02:25:21 GMT https://community.intel.com/t5/Software-Tuning-Performance/Disabling-cache-coherancy/m-p/823053#M1024 Patrick_F_Intel1 2012-05-16T02:25:21Z https://community.intel.com/t5/Software-Tuning-Performance/Disabling-cache-coherancy/m-p/823054#M1025 Hello Pat,<BR /><BR />I was thinking if there is a way to disable MESI protocol (but still take advantage of the cache beingavailable) that is typically used to address "false sharing". Assuming that i guarantee there will be no "false sharing", can i disable the protocol effects (overheads) induced by MESI.<BR /><BR />- Balu Wed, 16 May 2012 11:28:30 GMT https://community.intel.com/t5/Software-Tuning-Performance/Disabling-cache-coherancy/m-p/823054#M1025 balu_r_0212 2012-05-16T11:28:30Z