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    <title>topic Profiling memory accesses - which counters overlap with which? in Software Tuning, Performance Optimization &amp; Platform Monitoring</title>
    <link>https://community.intel.com/t5/Software-Tuning-Performance/Profiling-memory-accesses-which-counters-overlap-with-which/m-p/917347#M1182</link>
    <description>&lt;P&gt;Hi!&lt;/P&gt;
&lt;P&gt;I have some Perl scripts that implement some of the top-level vtune profiling for sandy bridge (and SB Xeon.)&lt;/P&gt;
&lt;P&gt;Noticably:&lt;/P&gt;
&lt;P&gt;* % cycles spent LLC miss: ~ 53%&lt;/P&gt;
&lt;P&gt;* % cycles spent doing DTLB walks: ~ 10%&lt;/P&gt;
&lt;P&gt;* % cycles spent accessing data modified by another core: ~ 3.5%&lt;/P&gt;
&lt;P&gt;My question: when doing DTLB walks (DTLB_LOAD_MISSES.WALK_DURATION) and cycles spent hit'ing on data modified by another core (MEM_LOAD_UOPS_LLC_HIT_RETIRED.XSNP_HITM) - do these overlap in any way with the LLC_MISS (ie memory access -&amp;nbsp;MEM_LOAD_UOPS_MISC_RETIRED.LLC_MISS) ? Partially overlap? Don't overlap at all?&lt;/P&gt;
&lt;P&gt;I'm especially interested in whether the DTLB walks count towards MEM_LOAD_UOPS_MISC_RETIRED.LLC_MISS.&lt;/P&gt;
&lt;P&gt;Thanks!&lt;/P&gt;
&lt;P&gt;&lt;/P&gt;
&lt;P&gt;-adrian&lt;/P&gt;</description>
    <pubDate>Tue, 03 Sep 2013 17:57:50 GMT</pubDate>
    <dc:creator>Adrian_C_1</dc:creator>
    <dc:date>2013-09-03T17:57:50Z</dc:date>
    <item>
      <title>Profiling memory accesses - which counters overlap with which?</title>
      <link>https://community.intel.com/t5/Software-Tuning-Performance/Profiling-memory-accesses-which-counters-overlap-with-which/m-p/917347#M1182</link>
      <description>&lt;P&gt;Hi!&lt;/P&gt;
&lt;P&gt;I have some Perl scripts that implement some of the top-level vtune profiling for sandy bridge (and SB Xeon.)&lt;/P&gt;
&lt;P&gt;Noticably:&lt;/P&gt;
&lt;P&gt;* % cycles spent LLC miss: ~ 53%&lt;/P&gt;
&lt;P&gt;* % cycles spent doing DTLB walks: ~ 10%&lt;/P&gt;
&lt;P&gt;* % cycles spent accessing data modified by another core: ~ 3.5%&lt;/P&gt;
&lt;P&gt;My question: when doing DTLB walks (DTLB_LOAD_MISSES.WALK_DURATION) and cycles spent hit'ing on data modified by another core (MEM_LOAD_UOPS_LLC_HIT_RETIRED.XSNP_HITM) - do these overlap in any way with the LLC_MISS (ie memory access -&amp;nbsp;MEM_LOAD_UOPS_MISC_RETIRED.LLC_MISS) ? Partially overlap? Don't overlap at all?&lt;/P&gt;
&lt;P&gt;I'm especially interested in whether the DTLB walks count towards MEM_LOAD_UOPS_MISC_RETIRED.LLC_MISS.&lt;/P&gt;
&lt;P&gt;Thanks!&lt;/P&gt;
&lt;P&gt;&lt;/P&gt;
&lt;P&gt;-adrian&lt;/P&gt;</description>
      <pubDate>Tue, 03 Sep 2013 17:57:50 GMT</pubDate>
      <guid>https://community.intel.com/t5/Software-Tuning-Performance/Profiling-memory-accesses-which-counters-overlap-with-which/m-p/917347#M1182</guid>
      <dc:creator>Adrian_C_1</dc:creator>
      <dc:date>2013-09-03T17:57:50Z</dc:date>
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