https://community.intel.com/t5/Software-Tuning-Performance/Null/m-p/919526#M1218 <P>What specifically is your question?&nbsp; You are running a benchmark where the bottleneck is expected to be in memory bandwidth.&nbsp; With a non-precise event, you can't control whether VTune attributes the counts to the responsible instruction or to one which is waiting for that instruction to complete.</P> <P>Are you trying to compare event rates?&nbsp; If so, you need to set sample-after values to convenient ratios.&nbsp; If you are comparing runs with and without mfence, it may help if you assure that the same sample-after values are used in each case.</P> Thu, 05 Sep 2013 12:45:43 GMT TimP 2013-09-05T12:45:43Z https://community.intel.com/t5/Software-Tuning-Performance/Null/m-p/919525#M1217 <P>Customer asked to close it .</P> Thu, 05 Sep 2013 11:17:09 GMT https://community.intel.com/t5/Software-Tuning-Performance/Null/m-p/919525#M1217 Zara_g_ 2013-09-05T11:17:09Z https://community.intel.com/t5/Software-Tuning-Performance/Null/m-p/919526#M1218 <P>What specifically is your question?&nbsp; You are running a benchmark where the bottleneck is expected to be in memory bandwidth.&nbsp; With a non-precise event, you can't control whether VTune attributes the counts to the responsible instruction or to one which is waiting for that instruction to complete.</P> <P>Are you trying to compare event rates?&nbsp; If so, you need to set sample-after values to convenient ratios.&nbsp; If you are comparing runs with and without mfence, it may help if you assure that the same sample-after values are used in each case.</P> Thu, 05 Sep 2013 12:45:43 GMT https://community.intel.com/t5/Software-Tuning-Performance/Null/m-p/919526#M1218 TimP 2013-09-05T12:45:43Z