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    <title>topic Formatting Raw Events for Perf... in Software Tuning, Performance Optimization &amp; Platform Monitoring</title>
    <link>https://community.intel.com/t5/Software-Tuning-Performance/Formatting-Raw-Events-for-Perf/m-p/924226#M1408</link>
    <description>&lt;P&gt;&lt;/P&gt;
&lt;P&gt;I am trying to run Perf with raw events and have couple of doubts. Firstly from the perf code that I have downloaded, I see this for one of the events for WestMere. How do I encode it in raw format? Without the inv and cmask I know it is "-r3fb1" but cant figure out what the value is with the inv and mask.&lt;/P&gt;
&lt;P&gt;intel_perfmon_event_map[PERF_COUNT_HW_STALLED_CYCLES_BACKEND] =&lt;/P&gt;
&lt;P&gt;X86_CONFIG(.event=0xb1, .umask=0x3f, .inv=1, .cmask=1);&lt;/P&gt;
&lt;P&gt;========================&lt;/P&gt;
&lt;P&gt;Also as per the manual the stall cycle is with a mask of 40H - not sure wht the code is trying to do 3F. I may have a bum version of the code maybe.&lt;STRONG&gt;&lt;/STRONG&gt;&lt;/P&gt;
&lt;P&gt;B1H 40H UOPS_EXECUTED.PORT015 Counts number of Uops executed that where issued&lt;BR /&gt;on port 0, 1, or 5.&lt;BR /&gt;use cmask=1, invert=1&lt;BR /&gt;to count stall cycles&lt;/P&gt;
&lt;P&gt;thanks for the help.&lt;/P&gt;
&lt;P&gt;&lt;/P&gt;
&lt;P&gt;&lt;/P&gt;</description>
    <pubDate>Sat, 13 Oct 2012 21:50:36 GMT</pubDate>
    <dc:creator>Shouvik_B_</dc:creator>
    <dc:date>2012-10-13T21:50:36Z</dc:date>
    <item>
      <title>Formatting Raw Events for Perf...</title>
      <link>https://community.intel.com/t5/Software-Tuning-Performance/Formatting-Raw-Events-for-Perf/m-p/924226#M1408</link>
      <description>&lt;P&gt;&lt;/P&gt;
&lt;P&gt;I am trying to run Perf with raw events and have couple of doubts. Firstly from the perf code that I have downloaded, I see this for one of the events for WestMere. How do I encode it in raw format? Without the inv and cmask I know it is "-r3fb1" but cant figure out what the value is with the inv and mask.&lt;/P&gt;
&lt;P&gt;intel_perfmon_event_map[PERF_COUNT_HW_STALLED_CYCLES_BACKEND] =&lt;/P&gt;
&lt;P&gt;X86_CONFIG(.event=0xb1, .umask=0x3f, .inv=1, .cmask=1);&lt;/P&gt;
&lt;P&gt;========================&lt;/P&gt;
&lt;P&gt;Also as per the manual the stall cycle is with a mask of 40H - not sure wht the code is trying to do 3F. I may have a bum version of the code maybe.&lt;STRONG&gt;&lt;/STRONG&gt;&lt;/P&gt;
&lt;P&gt;B1H 40H UOPS_EXECUTED.PORT015 Counts number of Uops executed that where issued&lt;BR /&gt;on port 0, 1, or 5.&lt;BR /&gt;use cmask=1, invert=1&lt;BR /&gt;to count stall cycles&lt;/P&gt;
&lt;P&gt;thanks for the help.&lt;/P&gt;
&lt;P&gt;&lt;/P&gt;
&lt;P&gt;&lt;/P&gt;</description>
      <pubDate>Sat, 13 Oct 2012 21:50:36 GMT</pubDate>
      <guid>https://community.intel.com/t5/Software-Tuning-Performance/Formatting-Raw-Events-for-Perf/m-p/924226#M1408</guid>
      <dc:creator>Shouvik_B_</dc:creator>
      <dc:date>2012-10-13T21:50:36Z</dc:date>
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