<?xml version="1.0" encoding="UTF-8"?>
<rss xmlns:content="http://purl.org/rss/1.0/modules/content/" xmlns:dc="http://purl.org/dc/elements/1.1/" xmlns:rdf="http://www.w3.org/1999/02/22-rdf-syntax-ns#" xmlns:taxo="http://purl.org/rss/1.0/modules/taxonomy/" version="2.0">
  <channel>
    <title>topic MSR 0x1AD (Turbo Ratio Limits) in Software Tuning, Performance Optimization &amp; Platform Monitoring</title>
    <link>https://community.intel.com/t5/Software-Tuning-Performance/MSR-0x1AD-Turbo-Ratio-Limits/m-p/768344#M153</link>
    <description>I know that I have read about it in one of the datasheets, but I cannot for the life of me find it anymore.&lt;DIV&gt;&lt;/DIV&gt;&lt;DIV&gt;What I am looking for is that document, like 326019.pdf and others, which talks about it, when two cores are active.&lt;/DIV&gt;&lt;DIV&gt;&lt;/DIV&gt;&lt;DIV&gt;Usually this MSR is used when only one core is active, but maybe it was for the X79 or the new Z77 PCH that now support two cores at once. I forgot. And that is where you experts come in handy ;)&lt;/DIV&gt;&lt;DIV&gt;&lt;/DIV&gt;&lt;DIV&gt;Also. When will 200 MHz banks be used? Wasn't that also for the Ivy Bridge CPU's?&lt;/DIV&gt;&lt;DIV&gt;&lt;/DIV&gt;&lt;DIV&gt;P.s. I hope that I am not breaking any rules (NDA) but I really need this info a.s.a.p. Please contact me per e-mail when I did.&lt;/DIV&gt;&lt;DIV&gt;&lt;/DIV&gt;&lt;DIV&gt;Thanks!&lt;/DIV&gt;</description>
    <pubDate>Mon, 23 Apr 2012 12:08:12 GMT</pubDate>
    <dc:creator>revogirl</dc:creator>
    <dc:date>2012-04-23T12:08:12Z</dc:date>
    <item>
      <title>MSR 0x1AD (Turbo Ratio Limits)</title>
      <link>https://community.intel.com/t5/Software-Tuning-Performance/MSR-0x1AD-Turbo-Ratio-Limits/m-p/768344#M153</link>
      <description>I know that I have read about it in one of the datasheets, but I cannot for the life of me find it anymore.&lt;DIV&gt;&lt;/DIV&gt;&lt;DIV&gt;What I am looking for is that document, like 326019.pdf and others, which talks about it, when two cores are active.&lt;/DIV&gt;&lt;DIV&gt;&lt;/DIV&gt;&lt;DIV&gt;Usually this MSR is used when only one core is active, but maybe it was for the X79 or the new Z77 PCH that now support two cores at once. I forgot. And that is where you experts come in handy ;)&lt;/DIV&gt;&lt;DIV&gt;&lt;/DIV&gt;&lt;DIV&gt;Also. When will 200 MHz banks be used? Wasn't that also for the Ivy Bridge CPU's?&lt;/DIV&gt;&lt;DIV&gt;&lt;/DIV&gt;&lt;DIV&gt;P.s. I hope that I am not breaking any rules (NDA) but I really need this info a.s.a.p. Please contact me per e-mail when I did.&lt;/DIV&gt;&lt;DIV&gt;&lt;/DIV&gt;&lt;DIV&gt;Thanks!&lt;/DIV&gt;</description>
      <pubDate>Mon, 23 Apr 2012 12:08:12 GMT</pubDate>
      <guid>https://community.intel.com/t5/Software-Tuning-Performance/MSR-0x1AD-Turbo-Ratio-Limits/m-p/768344#M153</guid>
      <dc:creator>revogirl</dc:creator>
      <dc:date>2012-04-23T12:08:12Z</dc:date>
    </item>
    <item>
      <title>MSR 0x1AD (Turbo Ratio Limits)</title>
      <link>https://community.intel.com/t5/Software-Tuning-Performance/MSR-0x1AD-Turbo-Ratio-Limits/m-p/768345#M154</link>
      <description>MSR 0x1ad is documented in the SoftwareDevelopment Manualvol 3, chapter 34.&lt;BR /&gt;Search for '1adh'.&lt;BR /&gt;The main website for the SDM is &lt;A href="http://www.intel.com/content/www/us/en/processors/architectures-software-developer-manuals.html"&gt;http://www.intel.com/content/www/us/en/processors/architectures-software-developer-manuals.html&lt;/A&gt;&lt;BR /&gt;&lt;BR /&gt;The Vol 3 manual is available at &lt;A href="http://download.intel.com/products/processor/manual/325384.pdf"&gt;http://download.intel.com/products/processor/manual/325384.pdf&lt;/A&gt; &lt;BR /&gt;</description>
      <pubDate>Mon, 23 Apr 2012 12:22:07 GMT</pubDate>
      <guid>https://community.intel.com/t5/Software-Tuning-Performance/MSR-0x1AD-Turbo-Ratio-Limits/m-p/768345#M154</guid>
      <dc:creator>Patrick_F_Intel1</dc:creator>
      <dc:date>2012-04-23T12:22:07Z</dc:date>
    </item>
    <item>
      <title>MSR 0x1AD (Turbo Ratio Limits)</title>
      <link>https://community.intel.com/t5/Software-Tuning-Performance/MSR-0x1AD-Turbo-Ratio-Limits/m-p/768346#M155</link>
      <description>Thanks for the links. I have all documents, be it in split up in form (3A, 3B and 3C). The combined one is much more fun to use so thanks again.&lt;SPAN style="font-family: verdana, sans-serif;"&gt;Problem is however not resolved. The documentation states: "Maximum turbo ratio limit of N core active."&lt;/SPAN&gt;&lt;SPAN style="font-family: verdana, sans-serif;"&gt;And like I said. I have seen an Intel document explaining the new speedstep where 2 simultaneous cpu-cores are active, per ratio (shareing the same bits). Bank feature was also changed to support 200 MHz.&lt;/SPAN&gt;&lt;SPAN style="font-family: verdana, sans-serif;"&gt;I though to go read it at a later time. Was busy with something else (writing a test report for the 3770K) and I wish I had made a note about it. But I didn't. Stupidly. Now I need it and can't locate it anymore, but trust me. It is there ;)&lt;/SPAN&gt;&lt;DIV&gt;&lt;DIV&gt;&lt;/DIV&gt;&lt;DIV&gt;Thanks!&lt;/DIV&gt;&lt;DIV&gt;&lt;B&gt;&lt;BR /&gt;&lt;/B&gt;&lt;/DIV&gt;&lt;DIV&gt;&lt;B&gt;&lt;BR /&gt;&lt;/B&gt;&lt;/DIV&gt;&lt;DIV&gt;&lt;B&gt;&lt;BR /&gt;&lt;/B&gt;&lt;/DIV&gt;&lt;DIV&gt;&lt;B&gt;Update: I found the reference to the 200 MHz but that was for RAM. Not the CPU. Oops.&lt;/B&gt;&lt;/DIV&gt;&lt;/DIV&gt;</description>
      <pubDate>Mon, 23 Apr 2012 14:28:10 GMT</pubDate>
      <guid>https://community.intel.com/t5/Software-Tuning-Performance/MSR-0x1AD-Turbo-Ratio-Limits/m-p/768346#M155</guid>
      <dc:creator>revogirl</dc:creator>
      <dc:date>2012-04-23T14:28:10Z</dc:date>
    </item>
  </channel>
</rss>

