<?xml version="1.0" encoding="UTF-8"?>
<rss xmlns:content="http://purl.org/rss/1.0/modules/content/" xmlns:dc="http://purl.org/dc/elements/1.1/" xmlns:rdf="http://www.w3.org/1999/02/22-rdf-syntax-ns#" xmlns:taxo="http://purl.org/rss/1.0/modules/taxonomy/" version="2.0">
  <channel>
    <title>topic Quote:Ronny B. wrote: in Software Tuning, Performance Optimization &amp; Platform Monitoring</title>
    <link>https://community.intel.com/t5/Software-Tuning-Performance/Details-on-the-RAPLModel/m-p/934181#M1643</link>
    <description>&lt;P&gt;&lt;/P&gt;&lt;BLOCKQUOTE&gt;Ronny B. wrote:&lt;BR /&gt;&lt;P&gt;&lt;/P&gt;
&lt;P&gt;Hey,&lt;/P&gt;
&lt;P&gt;is the model RAPL uses publicy available?&lt;/P&gt;
&lt;P&gt;Or did by any chance someone reverse engineer it?&lt;/P&gt;
&lt;P&gt;I'd be very interested to use it to predict power consumption of algorithms.&lt;/P&gt;
&lt;P&gt;cheers,&lt;/P&gt;
&lt;P&gt;Ronny&lt;/P&gt;
&lt;P&gt;&lt;/P&gt;&lt;/BLOCKQUOTE&gt;&lt;P&gt;&lt;/P&gt;
&lt;P&gt;How it could be reverse engineered? I suppose that an exact implementation is at microcode/hardware/ACPI level.&lt;/P&gt;</description>
    <pubDate>Sat, 27 Apr 2013 19:14:43 GMT</pubDate>
    <dc:creator>Bernard</dc:creator>
    <dc:date>2013-04-27T19:14:43Z</dc:date>
    <item>
      <title>Details on the RAPLModel</title>
      <link>https://community.intel.com/t5/Software-Tuning-Performance/Details-on-the-RAPLModel/m-p/934178#M1640</link>
      <description>&lt;P&gt;Hey,&lt;/P&gt;
&lt;P&gt;is the model RAPL uses publicy available?&lt;/P&gt;
&lt;P&gt;Or did by any chance someone reverse engineer it?&lt;/P&gt;
&lt;P&gt;I'd be very interested to use it to predict power consumption of algorithms.&lt;/P&gt;
&lt;P&gt;cheers,&lt;/P&gt;
&lt;P&gt;Ronny&lt;/P&gt;</description>
      <pubDate>Thu, 18 Apr 2013 07:17:35 GMT</pubDate>
      <guid>https://community.intel.com/t5/Software-Tuning-Performance/Details-on-the-RAPLModel/m-p/934178#M1640</guid>
      <dc:creator>Ronny_B_</dc:creator>
      <dc:date>2013-04-18T07:17:35Z</dc:date>
    </item>
    <item>
      <title>Hello Ronny,</title>
      <link>https://community.intel.com/t5/Software-Tuning-Performance/Details-on-the-RAPLModel/m-p/934179#M1641</link>
      <description>&lt;P&gt;Hello Ronny,&lt;/P&gt;
&lt;P&gt;The only information that Intel has exposed is in the "Intel® 64 and IA-32 Architectures Software Developer’s Manual", Volume 3 (3A, 3B &amp;amp; 3C), System Programming Guide available &lt;A href="http://www.intel.com/content/www/us/en/processors/architectures-software-developer-manuals.html"&gt;http://www.intel.com/content/www/us/en/processors/architectures-software-developer-manuals.html&lt;/A&gt;.&lt;/P&gt;
&lt;P&gt;See section 14.7 "PLATFORM SPECIFIC POWER MANAGEMENT SUPPORT", page 14-19, March 2013 edition.&lt;/P&gt;
&lt;P&gt;Pat&lt;/P&gt;</description>
      <pubDate>Thu, 18 Apr 2013 12:11:55 GMT</pubDate>
      <guid>https://community.intel.com/t5/Software-Tuning-Performance/Details-on-the-RAPLModel/m-p/934179#M1641</guid>
      <dc:creator>Patrick_F_Intel1</dc:creator>
      <dc:date>2013-04-18T12:11:55Z</dc:date>
    </item>
    <item>
      <title>that and this http:/</title>
      <link>https://community.intel.com/t5/Software-Tuning-Performance/Details-on-the-RAPLModel/m-p/934180#M1642</link>
      <description>&lt;P&gt;that and this &lt;A href="http://ieeexplore.ieee.org/xpls/abs_all.jsp?arnumber=5599016&amp;amp;tag=1" target="_blank"&gt;http://ieeexplore.ieee.org/xpls/abs_all.jsp?arnumber=5599016&amp;amp;tag=1&lt;/A&gt;&lt;/P&gt;
&lt;P&gt;but, sadly, I didn't find anything else.&lt;/P&gt;</description>
      <pubDate>Thu, 18 Apr 2013 12:37:25 GMT</pubDate>
      <guid>https://community.intel.com/t5/Software-Tuning-Performance/Details-on-the-RAPLModel/m-p/934180#M1642</guid>
      <dc:creator>Ronny_B_</dc:creator>
      <dc:date>2013-04-18T12:37:25Z</dc:date>
    </item>
    <item>
      <title>Quote:Ronny B. wrote:</title>
      <link>https://community.intel.com/t5/Software-Tuning-Performance/Details-on-the-RAPLModel/m-p/934181#M1643</link>
      <description>&lt;P&gt;&lt;/P&gt;&lt;BLOCKQUOTE&gt;Ronny B. wrote:&lt;BR /&gt;&lt;P&gt;&lt;/P&gt;
&lt;P&gt;Hey,&lt;/P&gt;
&lt;P&gt;is the model RAPL uses publicy available?&lt;/P&gt;
&lt;P&gt;Or did by any chance someone reverse engineer it?&lt;/P&gt;
&lt;P&gt;I'd be very interested to use it to predict power consumption of algorithms.&lt;/P&gt;
&lt;P&gt;cheers,&lt;/P&gt;
&lt;P&gt;Ronny&lt;/P&gt;
&lt;P&gt;&lt;/P&gt;&lt;/BLOCKQUOTE&gt;&lt;P&gt;&lt;/P&gt;
&lt;P&gt;How it could be reverse engineered? I suppose that an exact implementation is at microcode/hardware/ACPI level.&lt;/P&gt;</description>
      <pubDate>Sat, 27 Apr 2013 19:14:43 GMT</pubDate>
      <guid>https://community.intel.com/t5/Software-Tuning-Performance/Details-on-the-RAPLModel/m-p/934181#M1643</guid>
      <dc:creator>Bernard</dc:creator>
      <dc:date>2013-04-27T19:14:43Z</dc:date>
    </item>
  </channel>
</rss>

