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    <title>topic &amp;gt;&amp;gt;&amp;gt;I'm not sure. in Software Tuning, Performance Optimization &amp; Platform Monitoring</title>
    <link>https://community.intel.com/t5/Software-Tuning-Performance/RAPL-DRAM-and-PCM/m-p/942616#M2002</link>
    <description>&amp;gt;&amp;gt;&amp;gt;I'm not sure.
I used PAPI 5.0.1 and using the code I found here:
http://www.eece.maine.edu/~vweaver/projects/rapl/rapl_msr.c&amp;gt;&amp;gt;&amp;gt;

Sadly there is no shown the exact implementation of MSR reading/writing routines,Can you disassemble those routines?</description>
    <pubDate>Tue, 01 Jan 2013 07:15:59 GMT</pubDate>
    <dc:creator>Bernard</dc:creator>
    <dc:date>2013-01-01T07:15:59Z</dc:date>
    <item>
      <title>RAPL, DRAM and PCM</title>
      <link>https://community.intel.com/t5/Software-Tuning-Performance/RAPL-DRAM-and-PCM/m-p/942608#M1994</link>
      <description>&lt;P&gt;I have a coupe of questions regarding RAPL and PCM.&lt;/P&gt;
&lt;P&gt;1) Does the DRAM RAPL Domain measure energy consumed by the DRAM module itself or the energy conumsed by the interface in the CPU package?&lt;/P&gt;
&lt;P&gt;2) Somebody mentioned that PCM 2.0 can measure DRAM energy this needs the right BIOS. Is this referring to the motherboard BIOS? Also, is this the same as the DRAM RAPL Domain measurements?&lt;/P&gt;
&lt;P&gt;Thank you.&lt;/P&gt;
&lt;P&gt;&lt;/P&gt;</description>
      <pubDate>Mon, 05 Nov 2012 21:00:21 GMT</pubDate>
      <guid>https://community.intel.com/t5/Software-Tuning-Performance/RAPL-DRAM-and-PCM/m-p/942608#M1994</guid>
      <dc:creator>Jee_C_</dc:creator>
      <dc:date>2012-11-05T21:00:21Z</dc:date>
    </item>
    <item>
      <title>Hi Jee C,</title>
      <link>https://community.intel.com/t5/Software-Tuning-Performance/RAPL-DRAM-and-PCM/m-p/942609#M1995</link>
      <description>Hi Jee C,

the DRAM RAPL domain includes energy consumption by the DRAM modules. Intel PCM uses DRAM RAPL counters to implement its DRAM energy metrics. The board manufacturer has to calibrate and tune DRAM voltage regulators for DRAM RAPL feature and then enable DRAM RAPL MSR in the BIOS.

Thanks,
Roman</description>
      <pubDate>Wed, 07 Nov 2012 09:22:02 GMT</pubDate>
      <guid>https://community.intel.com/t5/Software-Tuning-Performance/RAPL-DRAM-and-PCM/m-p/942609#M1995</guid>
      <dc:creator>Roman_D_Intel</dc:creator>
      <dc:date>2012-11-07T09:22:02Z</dc:date>
    </item>
    <item>
      <title>Hi, Roman.</title>
      <link>https://community.intel.com/t5/Software-Tuning-Performance/RAPL-DRAM-and-PCM/m-p/942610#M1996</link>
      <description>Hi, Roman.
Thanks for the info.
Do Intel motherboards support this feature? For example:
Intel S2600CP4
Will this one support reading DRAM energy metric?

Thanks
-- Jee</description>
      <pubDate>Wed, 07 Nov 2012 21:05:57 GMT</pubDate>
      <guid>https://community.intel.com/t5/Software-Tuning-Performance/RAPL-DRAM-and-PCM/m-p/942610#M1996</guid>
      <dc:creator>Jee_C_</dc:creator>
      <dc:date>2012-11-07T21:05:57Z</dc:date>
    </item>
    <item>
      <title>Hi Jee C.,</title>
      <link>https://community.intel.com/t5/Software-Tuning-Performance/RAPL-DRAM-and-PCM/m-p/942611#M1997</link>
      <description>Hi Jee C.,

See &lt;A href="http://software.intel.com/en-us/forums/topic/278022"&gt;this thread&lt;/A&gt; please.

hope it helps, let us know if it works for you.

Roman</description>
      <pubDate>Mon, 26 Nov 2012 10:32:12 GMT</pubDate>
      <guid>https://community.intel.com/t5/Software-Tuning-Performance/RAPL-DRAM-and-PCM/m-p/942611#M1997</guid>
      <dc:creator>Roman_D_Intel</dc:creator>
      <dc:date>2012-11-26T10:32:12Z</dc:date>
    </item>
    <item>
      <title>Hi.</title>
      <link>https://community.intel.com/t5/Software-Tuning-Performance/RAPL-DRAM-and-PCM/m-p/942612#M1998</link>
      <description>Hi.
We have not purchased the Intel S2600CP4 yet, so haven't been able to test what was suggested in the manual. 
However, we recently built a code development Sandy Bridge system using 
ASUS Z9PE-D16/2L SSI EEB Server Motherboard Dual LGA 2011 DDR3 1600.
This seems to support the DRAM energy measurements. This is what we got from PAPI 5.0.1.


Energy measurements:
rapl:::PACKAGE_ENERGY:PACKAGE0	13.032684J	(Average Power 13.0W)
rapl:::PACKAGE_ENERGY:PACKAGE1	12.657837J	(Average Power 12.7W)
rapl:::DRAM_ENERGY:PACKAGE0	14.408752J	(Average Power 14.4W)
rapl:::DRAM_ENERGY:PACKAGE1	1.955688J	(Average Power 2.0W)
rapl:::PP0_ENERGY:PACKAGE0	1.785553J	(Average Power 1.8W)
rapl:::PP0_ENERGY:PACKAGE1	1.756424J	(Average Power 1.8W)</description>
      <pubDate>Sun, 30 Dec 2012 02:25:40 GMT</pubDate>
      <guid>https://community.intel.com/t5/Software-Tuning-Performance/RAPL-DRAM-and-PCM/m-p/942612#M1998</guid>
      <dc:creator>Jee_C_</dc:creator>
      <dc:date>2012-12-30T02:25:40Z</dc:date>
    </item>
    <item>
      <title>I am having problems with an</title>
      <link>https://community.intel.com/t5/Software-Tuning-Performance/RAPL-DRAM-and-PCM/m-p/942613#M1999</link>
      <description>I am having problems with an Ivy Bridge CPU. This is the Intel Core i3 3217-U from the NUC.
When I try to read the MSR_PKG_POWER_INFO register to see what the CPU's power specs are this is what I get:

Package thermal spec: 17.000W
Package minimum power: 0.000W
Package maximum power: 0.000W
Package maximum time window: 0.000s

The same code seems to work fine on Sandy Bridge systems. Does anybody know why this isn't working on this Ivy Bridge CPU?

Thanks.
-- Jee</description>
      <pubDate>Sun, 30 Dec 2012 02:29:46 GMT</pubDate>
      <guid>https://community.intel.com/t5/Software-Tuning-Performance/RAPL-DRAM-and-PCM/m-p/942613#M1999</guid>
      <dc:creator>Jee_C_</dc:creator>
      <dc:date>2012-12-30T02:29:46Z</dc:date>
    </item>
    <item>
      <title>&gt;&gt;&gt;When I try to read the MSR</title>
      <link>https://community.intel.com/t5/Software-Tuning-Performance/RAPL-DRAM-and-PCM/m-p/942614#M2000</link>
      <description>&amp;gt;&amp;gt;&amp;gt;When I try to read the MSR_PKG_POWER_INFO register to see what the CPU's power specs are this is what I get:&amp;gt;&amp;gt;&amp;gt;
Do you access that register programmaticaly?I mean by kernel mode driver?</description>
      <pubDate>Mon, 31 Dec 2012 19:49:00 GMT</pubDate>
      <guid>https://community.intel.com/t5/Software-Tuning-Performance/RAPL-DRAM-and-PCM/m-p/942614#M2000</guid>
      <dc:creator>Bernard</dc:creator>
      <dc:date>2012-12-31T19:49:00Z</dc:date>
    </item>
    <item>
      <title>I'm not sure.</title>
      <link>https://community.intel.com/t5/Software-Tuning-Performance/RAPL-DRAM-and-PCM/m-p/942615#M2001</link>
      <description>I'm not sure. 
I used PAPI 5.0.1 and using the code I found here:
&lt;A href="http://www.eece.maine.edu/~vweaver/projects/rapl/rapl_msr.c" target="_blank"&gt;http://www.eece.maine.edu/~vweaver/projects/rapl/rapl_msr.c&lt;/A&gt;
Both PAPI and this code give the same numbers for spec, min, max and time windows.
I have sudo access to /dev/cpu/0/msr and it seems to read the thermal spec (17W) fine, but not the other numbers.</description>
      <pubDate>Mon, 31 Dec 2012 19:56:40 GMT</pubDate>
      <guid>https://community.intel.com/t5/Software-Tuning-Performance/RAPL-DRAM-and-PCM/m-p/942615#M2001</guid>
      <dc:creator>Jee_C_</dc:creator>
      <dc:date>2012-12-31T19:56:40Z</dc:date>
    </item>
    <item>
      <title>&gt;&gt;&gt;I'm not sure.</title>
      <link>https://community.intel.com/t5/Software-Tuning-Performance/RAPL-DRAM-and-PCM/m-p/942616#M2002</link>
      <description>&amp;gt;&amp;gt;&amp;gt;I'm not sure.
I used PAPI 5.0.1 and using the code I found here:
http://www.eece.maine.edu/~vweaver/projects/rapl/rapl_msr.c&amp;gt;&amp;gt;&amp;gt;

Sadly there is no shown the exact implementation of MSR reading/writing routines,Can you disassemble those routines?</description>
      <pubDate>Tue, 01 Jan 2013 07:15:59 GMT</pubDate>
      <guid>https://community.intel.com/t5/Software-Tuning-Performance/RAPL-DRAM-and-PCM/m-p/942616#M2002</guid>
      <dc:creator>Bernard</dc:creator>
      <dc:date>2013-01-01T07:15:59Z</dc:date>
    </item>
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