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    <title>topic How to know the exact cache associative on processor in Software Tuning, Performance Optimization &amp; Platform Monitoring</title>
    <link>https://community.intel.com/t5/Software-Tuning-Performance/How-to-know-the-exact-cache-associative-on-processor/m-p/775410#M246</link>
    <description>Hi, all&lt;BR /&gt;&lt;BR /&gt;How to get the exact associative pattern of each cache level? &lt;BR /&gt;For example, the cache associative of Xeon 5650 processor at different cache level. I have tried to find out that information, but I failed. &lt;BR /&gt;&lt;BR /&gt;Thank you in advance!</description>
    <pubDate>Wed, 01 Aug 2012 12:29:30 GMT</pubDate>
    <dc:creator>zhangyihere</dc:creator>
    <dc:date>2012-08-01T12:29:30Z</dc:date>
    <item>
      <title>How to know the exact cache associative on processor</title>
      <link>https://community.intel.com/t5/Software-Tuning-Performance/How-to-know-the-exact-cache-associative-on-processor/m-p/775410#M246</link>
      <description>Hi, all&lt;BR /&gt;&lt;BR /&gt;How to get the exact associative pattern of each cache level? &lt;BR /&gt;For example, the cache associative of Xeon 5650 processor at different cache level. I have tried to find out that information, but I failed. &lt;BR /&gt;&lt;BR /&gt;Thank you in advance!</description>
      <pubDate>Wed, 01 Aug 2012 12:29:30 GMT</pubDate>
      <guid>https://community.intel.com/t5/Software-Tuning-Performance/How-to-know-the-exact-cache-associative-on-processor/m-p/775410#M246</guid>
      <dc:creator>zhangyihere</dc:creator>
      <dc:date>2012-08-01T12:29:30Z</dc:date>
    </item>
    <item>
      <title>How to know the exact cache associative on processor</title>
      <link>https://community.intel.com/t5/Software-Tuning-Performance/How-to-know-the-exact-cache-associative-on-processor/m-p/775411#M247</link>
      <description>&lt;DIV id="tiny_quote"&gt;&lt;DIV style="margin-left: 2px; margin-right: 2px;"&gt;Quoting &lt;A jquery1343963370546="60" rel="/en-us/services/profile/quick_profile.php?is_paid=&amp;amp;user_id=328639" href="https://community.intel.com/en-us/profile/328639/" class="basic"&gt;zhangyihere&lt;/A&gt;&lt;/DIV&gt;&lt;DIV style="background-color: #e5e5e5; margin-left: 2px; margin-right: 2px; border: 1px inset; padding: 5px;"&gt;&lt;I&gt;...How to get the exact associative pattern of each cache level?..&lt;/I&gt;&lt;/DIV&gt;&lt;BR /&gt;Did you try Intel&lt;STRONG&gt;CPUID&lt;/STRONG&gt; instruction? Here is an example with intrinsic &lt;STRONG&gt;__cpuid&lt;/STRONG&gt; function:&lt;BR /&gt;[cpp]	...
	__cpuid( CPUInfo, 0x80000000 );				// Get the number of valid Extended IDs

	nExIds = ( RTuint )CPUInfo[0];
	CrtMemset( CPUBrandString, 0x0, sizeof( CPUBrandString ) );

	for( i = 0x80000000; i &amp;lt;= nExIds; ++i )		// Get the information associated with each extended ID
	{
		__cpuid( CPUInfo, i );

		CrtPrintf( RTU("Extended Function CPUID Information %xn"), i );
		CrtPrintf( RTU("tCPUInfo[0] = 0x%08Xn"), CPUInfo[0] );
		CrtPrintf( RTU("tCPUInfo[1] = 0x%08Xn"), CPUInfo[1] );
		CrtPrintf( RTU("tCPUInfo[2] = 0x%08Xn"), CPUInfo[2] );
		CrtPrintf( RTU("tCPUInfo[3] = 0x%08Xn"), CPUInfo[3] );
												// Process CPU brand String and Cache information
		if( i == 0x80000002 )
			CrtMemcpy( CPUBrandString, CPUInfo, sizeof( CPUInfo ) );
		else
		if( i == 0x80000003 )
			CrtMemcpy( CPUBrandString + 16, CPUInfo, sizeof( CPUInfo ) );
		else
		if( i == 0x80000004 )
			CrtMemcpy( CPUBrandString + 32, CPUInfo, sizeof( CPUInfo ) );
		else
		if( i == 0x80000006 )
		{
			nCacheLineSize = CPUInfo[2] &amp;amp; 0xff;
			nL2Associativity = ( CPUInfo[2] &amp;gt;&amp;gt; 12 ) &amp;amp; 0xf;
			nCacheSizeK = ( CPUInfo[2] &amp;gt;&amp;gt; 16 ) &amp;amp; 0xffff;
		}
	}
	...
	if( nExIds &amp;gt;= 0x80000006 )
	{
		CrtPrintf( RTU("tCache Line Size = %ldn"), nCacheLineSize );
		CrtPrintf( RTU("tL2 Associativity = %ldn"), nL2Associativity );
		CrtPrintf( RTU("tCache Size = %ldKn"), nCacheSizeK );
	}
	...
[/cpp]&lt;BR /&gt;Output shouldlook like:&lt;BR /&gt;&lt;BR /&gt; ...&lt;BR /&gt; Cache Line Size = ...&lt;BR /&gt; L2 Associativity = ...&lt;BR /&gt; Cache Size = ...K&lt;BR /&gt; ...&lt;/DIV&gt;</description>
      <pubDate>Fri, 03 Aug 2012 03:20:53 GMT</pubDate>
      <guid>https://community.intel.com/t5/Software-Tuning-Performance/How-to-know-the-exact-cache-associative-on-processor/m-p/775411#M247</guid>
      <dc:creator>SergeyKostrov</dc:creator>
      <dc:date>2012-08-03T03:20:53Z</dc:date>
    </item>
    <item>
      <title>I would also recommend to use</title>
      <link>https://community.intel.com/t5/Software-Tuning-Performance/How-to-know-the-exact-cache-associative-on-processor/m-p/775412#M248</link>
      <description>I would also recommend to use Windbg in its kernel mode as primary source of memory and CPU inspection tool.
Regarding CPU the most valuable information is contained in PCR and PCRB structures.You can dump these structures with the !pcr command
use dt nt!_KPCR [address of PCR] -b -v -r.</description>
      <pubDate>Sat, 22 Dec 2012 09:06:34 GMT</pubDate>
      <guid>https://community.intel.com/t5/Software-Tuning-Performance/How-to-know-the-exact-cache-associative-on-processor/m-p/775412#M248</guid>
      <dc:creator>Bernard</dc:creator>
      <dc:date>2012-12-22T09:06:34Z</dc:date>
    </item>
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